DESIGN CONSIDERATIONS
60
MultiConnect
®
mDot
TM
MTDOT Developer Guide for Japan
Locate high frequency circuits in a separate area to minimize capacitive coupling to other circuits.
Locate cables and connectors to avoid coupling from high frequency circuits.
Lay out the highest frequency signal traces next to the ground grid.
If using a multilayer board design, make no cuts in the ground or power planes and be sure the ground
plane covers all traces.
Minimize the number of through-hole connections on traces carrying high frequency signals.
Avoid right angle turns on high frequency traces. Forty-five degree corners are good; however, radius turns
are better.
On 2-layer boards with no ground grid, provide a shadow ground trace on the opposite side of the board to
traces carrying high frequency signals. This will be effective as a high frequency ground return if it is three
times the width of the signal traces.
Distribute high frequency signals continuously on a single trace rather than several traces radiating from
one point.
Electrostatic Discharge Control
Handle all electronic devices with precautions to avoid damage due to the static charge accumulation.
See the ANSI/ESD Association Standard (ANSI/ESD S20.20-1999) – a document “for the Development of an
Electrostatic Discharge Control for Protection of Electrical and Electronic Parts, Assemblies and Equipment.” This
document covers ESD Control Program Administrative Requirements, ESD Training, ESD Control Program Plan
Technical Requirements (grounding/bonding systems, personnel grooming, protected areas, packaging, marking,
equipment, and handling), and Sensitivity Testing.
MultiTech strives to follow these recommendations. Input protection circuitry is incorporated in MultiTech devices
to minimize the effect of static buildup. Take precautions to avoid exposure to electrostatic discharge during
handling.
MultiTech uses and recommends that others use anti-static boxes that create a faraday cage (packaging designed
to exclude electromagnetic fields). MultiTech recommends that you use our packaging when returning a product
and when you ship your products to your customers.
USB Design
MultiTech recommends that you review Intel's High Speed USB Platform Design Guidelines for information about
USB signal routing, impedance, and layer stacking. Also:
Shield USB cables with twisted pairs (especially those containing D+/D-).
Use a single 5V power supply for USB devices. See Power Draw for current (ampere) requirements.
Route D+/D- together in parallel with the trace spacing needed to achieve 90 ohms differential impedance
for the USB pair and to maintain a 20 mil space from the USB pair and all other signals.
If power is provided externally, use a common ground between the carrier board and the device.
Summary of Contents for MultiConnect mDot MTDOT Series
Page 1: ...MultiConnect mDotTM MTDOT Developer Guide for Japan...
Page 40: ...DEVELOPER BOARD INSTALLATION 40 MultiConnect mDotTM MTDOT Developer Guide for Japan...
Page 45: ...DEVELOPER BOARD SCHEMATICS MultiConnect mDotTM MTDOT Developer Guide for Japan 45 Schematics...
Page 46: ...DEVELOPER BOARD SCHEMATICS 46 MultiConnect mDotTM MTDOT Developer Guide for Japan...
Page 47: ...DEVELOPER BOARD SCHEMATICS MultiConnect mDotTM MTDOT Developer Guide for Japan 47...
Page 48: ...DEVELOPER BOARD SCHEMATICS 48 MultiConnect mDotTM MTDOT Developer Guide for Japan...
Page 49: ...DEVELOPER BOARD SCHEMATICS MultiConnect mDotTM MTDOT Developer Guide for Japan 49...
Page 54: ...MICRO DEVELOPER KIT 54 MultiConnect mDotTM MTDOT Developer Guide for Japan Schematics...
Page 55: ...MICRO DEVELOPER KIT MultiConnect mDotTM MTDOT Developer Guide for Japan 55...
Page 56: ...MICRO DEVELOPER KIT 56 MultiConnect mDotTM MTDOT Developer Guide for Japan...
Page 57: ...MICRO DEVELOPER KIT MultiConnect mDotTM MTDOT Developer Guide for Japan 57...
Page 58: ...MICRO DEVELOPER KIT 58 MultiConnect mDotTM MTDOT Developer Guide for Japan...