MSI MS-S1311, User Manual

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BIOS Setup MS-S1311
▶ Adjacent Cache Prefetch
The processor has a hardware adjacent cache line prefetch mechanism that
automatically fetches an extra 64-byte cache line whenever the processor
requests for a 64-byte cache line. This reduces cache latency by making
the next cache line immediately available if the processor requires it as well.
When enabled, the processor will retrieve the currently requested cache line,
as well as the subsequent cache line. When disabled, the processor will only
retrieve the currently requested cache line.
▶
DCU Streamer Prefetcher
This setting enables/disables the function of Data Cache Unit (DCU) Stream -
er prefetcher. If this setting is set to [Enabled], when the DCU Streamer
prefetcher detects multiple loads from the same line done within a time limit, it
prefetches the next line into the L1 data cache.
▶
DCU IP Prefetcher
The Data Cache Unit (DCU) IP prefetcher scrutinizes historical reading in or -
der to have an overall diagram and loads foreseeable data in L1 cache.
▶
Memory Configuration
▶
Memory Frequency
This setting specifies the memory frequency.