MSC Technologies Avnet COM Express CXC-BT, User Manual

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MSC CXC-BT User Manual
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2.10.6
PCI Express Lanes
Signal Pin
Type Signal
Level Power
Rail Remark /
Tolerance PU/PD/SR Description Source / Target
PCIE_TX[0:1]+
PCIE_TX[0:1]- O PCIe 1.0V AC coupled
on module PCI Express Differential Transmit Pairs 0 through 1 BT SOC lane 0,
BT SOC lane 1
or PCIe switch
PCIE_RX[0:1]+
PCIE_RX[0:1]- I PCIe 1.0V AC coupled
off module PCI Express Differential Receive Pairs 0 through 1 BT SOC lane 0,
BT SOC lane 1
or PCIe switch
PCIE_TX[2:3]+
PCIE_TX[2:3]- O PCIe 1.0V AC coupled
on module PCI Express Differential Transmit Pairs 2 through 3
(Only available with PCIe switch option) PCIe switch
PCIE_RX[2:3]+
PCIE_RX[2:3]- I PCIe 1.0V AC coupled
off module PCI Express Differential Receive Pairs 2 through 3
(Only available with PCIe switch option) PCIe switch
PCIE_
PCIE_CLK_REF- O PCIe
CLK 1.0V Differential Reference Clock output for all PCI Express and PCI
Express Graphics lanes. BT SOC
Considerable care must be taken when using high speed signals on the carrier board. Reliable functionality depends on the following factors:
a. Trace length on the carrier board
b. Number of vias used on the carrier board
c. PCB material and specification used for the carrier board
d. Target device
2.10.7
Express Card Support
Signal Pin
Type Signal
Level Power
Rail Remark /
Tolerance PU/PD Description Source / Target
EXCD[0]_CPPE# I CMOS 3.3V 3.3V
ePU = 10 KΩ
ExpressCard card request, active low BT SOC
EXCD[1]_CPPE# I CMOS 3.3V 3.3V
ePU = 10 KΩ
ExpressCard card request, active low BT SOC
EXCD[0]_RST# O CMOS 3.3V 3.8V, 24mA ExpressCard reset, active low BT SOC
EXCD[1]_RST# O CMOS 3.3V 3.8V, 24mA ExpressCard reset, active low BT SOC