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Block Diagram

3-18

3

Four signals are involved in the P2 multiplexing function: MXDO, MXDI,
MXCLK, and MXSYNC

∗

.

MXDO is a time-multiplexed data output line from the main board and
MXDI is a time-multiplexed line from the MVME760 module. MXCLK
is a 10MHz bit clock for the MXDO and MXDI data lines. MXSYNC

∗

is

asserted for one bit time at time slot 15 (refer to the following table) by the
MVME1600-001 base board. The MVME760 transition module uses
MXSYNC

∗

to synchronize with the base board.

A 16-to-1 multiplexing scheme is used with MXCLK’s 10MHz bit rate.
Sixteen time slots are defined and allocated as follows:

Table 3-2. P2 Multiplexing Sequence

MXDO (From Base Board)

MXDI (From MVME760)

Time Slot

Signal Name

Time Slot

Signal Name

0

RTS3

0

CTS3

1

DTR3

1

DSR3/MID1

2

LLB3/MODSEL

2

DCD3

3

RLB3

3

TM3/MID0

4

RTS4

4

RI3

5

DTR4

5

CTS4

6

LLB4

6

DSR4/MID3

7

RLB4

7

DCD4

8

IDREQ

∗

8

TM4/MID2

9

Reserved

9

RI4

10

Reserved

10

LANPWR

11

Reserved

11

Reserved

12

Reserved

12

Reserved

13

Reserved

13

Reserved

14

Reserved

14

Reserved

15

Reserved

15

GENIO_PRESENT

∗

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Summary of Contents for MVME1603

Page 1: ...MVME1603 MVME1604 Single Board Computer Installation and Use V1600 1A IH4 ...

Page 2: ...rior written permission of Motorola Inc It is possible that this publication may contain reference to or information about Motorola products machines and programs programming or services that are not announced in your country Such references or information must not be construed to mean that Motorola intends to announce such Motorola products programming or services in your country Restricted Right...

Page 3: ...ab environment for experimental purposes A basic knowledge of computers and digital logic is assumed To use this manual you should be familiar with the publications listed in Appendix A of this manual The MVME1603 1604 family of Single Board Computers has two parallel branches based on two distinct versions of the base board Both versions are populated with a number of similar plug together compon...

Page 4: ... refer to a signal that is active or true negation and negate indicate a signal that is inactive or false These terms are used independently of the voltage level high or low that they represent Data and address sizes are defined as follows A byte is eight bits numbered 0 through 7 with bit 0 being the least significant A half word is 16 bits numbered 0 through 15 with bit 0 being the least signifi...

Page 5: ... or other qualified maintenance personnel may remove equipment covers for internal subassembly or component replacement or any internal adjustment Do not replace components with power cable connected Under certain conditions dangerous voltages may exist even with the power cable removed To avoid injuries always disconnect power and discharge circuits before touching them Do Not Service or Adjust A...

Page 6: ...bility Generic Immunity Standard Part 1 Residential Commercial and Light Industry IEC801 2 Electromagnetic Compatibility for Industrial Process Measurement and Control Equipment Part 2 Electrostatic Discharge Requirements IEC801 3 Electromagnetic Compatibility for Industrial Process Measurement and Control Equipment Part 3 Radiated Electromagnetic Field Requirements IEC801 4 Electromagnetic Compat...

Page 7: ...0 011 Base Board Preparation 1 18 Serial Port 4 DCE DTE Selection J7 1 18 Serial Port 4 Clock Selection J8 15 16 1 20 Serial Port 4 I O Path Selection J9 1 21 VMEbus System Controller Selection J10 1 22 Serial Port 3 I O Path Selection J13 1 23 General Purpose Software Readable Header J14 1 23 Remote Status and Control 1 25 MVME712M Transition Module Preparation 1 27 Serial Ports 1 4 DCE DTE Confi...

Page 8: ... MCP 2 21 Maskable Interrupts 2 21 VMEchip2 Interrupts 2 23 Z8536 and Z85230 Interrupts 2 23 DMA Channels 2 24 Sources of Reset 2 24 Endian Issues 2 25 Processor Memory Domain 2 25 PCI Domain 2 28 VMEbus Domain 2 28 CHAPTER 3 Functional Description Introduction 3 1 Features 3 1 General Description 3 3 Block Diagram 3 4 SCSI Interface 3 6 SCSI Termination 3 6 Ethernet Interface 3 7 Graphics Interfa...

Page 9: ...0 011 Base Board 3 23 Speaker Control 3 24 PM603 604 Processor Memory Mezzanine Module 3 24 RAM104 Memory Module 3 26 MVME760 Transition Module 3 27 Serial Interface Modules 3 27 MVME712M Transition Module 3 28 CHAPTER 4 Connector Pin Assignments Common Connectors 4 2 LED Mezzanine Connector 4 3 MPU Mezzanine Connector 4 3 CPU Connector 4 6 DRAM Expansion Connectors 4 10 PCI Mezzanine Card Connect...

Page 10: ...ation 5 2 Using the Debugger 5 3 Debugger Commands 5 4 Diagnostic Tests 5 7 CHAPTER 6 CNFG and ENV Commands Overview 6 1 CNFG Configure Board Information Block 6 2 ENV Set Environment 6 3 Configuring the PPCBug Parameters 6 3 Configuring the VMEbus Interface 6 12 Slave Address Decoders 6 13 APPENDIX A Related Documentation Motorola Computer Group Documents A 1 Manufacturers Documents A 3 Related S...

Page 11: ...nd Header Locations 1 17 Figure 1 5 MVME1600 011 Switches Headers Connectors Fuses LEDs 1 19 Figure 1 6 MVME712M Connector and Header Locations 1 28 Figure 1 7 J15 Clock Line Configuration 1 29 Figure 1 8 MVME1600 011 Serial Port 4 Clock Configuration 1 30 Figure 1 9 P2 Adapter Component Placement 1 31 Figure 1 10 PM603 PM604 Placement on MVME1603 1604 1 34 Figure 1 11 RAM104 Placement on PM603 PM...

Page 12: ...able 3 3 Fuse Assignments by Base Board 3 22 Table 3 4 Minimum ROMFAL and ROMNAL Values 3 26 Table 3 5 Module Type Identification 3 27 Table 4 1 LED Mezzanine Connector 4 3 Table 4 2 MPU Mezzanine Connector 4 4 Table 4 3 CPU Connector 4 7 Table 4 4 DRAM Mezzanine Connector 1 4 10 Table 4 5 DRAM Mezzanine Connector 2 4 11 Table 4 6 PCI Mezzanine Card Connector 4 12 Table 4 7 VMEbus Connector P1 4 1...

Page 13: ...Related Specifications A 8 Table B 1 MVME1600 001 MVME1600 011 Specifications B 1 Table C 1 MVME1600 001 MVME1600 011 Serial Ports C 1 Table C 2 EIA 232 D Interconnect Signals C 3 Table C 3 EIA 232 D Interface Transmitter Characteristics C 5 Table C 4 EIA 232 D Interface Receiver Characteristics C 5 Table C 5 MVME760 EIA 530 Interconnect Signals C 6 Table C 6 EIA 530 Interface Transmitter Characte...

Page 14: ...xiv ...

Page 15: ...ME1603 1604 family has two parallel branches based on two distinct versions MVME1600 001 and MVME1600 011 of the base board The differences between the MVME1600 001 and the MVME1600 011 lie mainly in the area of I O handling the logic design is the same for both versions In either case the complete MVME1603 1604 consists of the base board plus A processor memory module PM603 or PM604 with optional...

Page 16: ...to complete an MVME1603 1604 system VME system enclosure System console terminal Transition module MVME760 for the MVME1600 001 base boards MVME712M for the MVME1600 011 and connecting cables Disk drives and or other I O and controllers Operating system and or application software ...

Page 17: ...TOR TERMINATORS GRAPHICS CL GD5446 DRAM 256Kx16 SCSI NCR 53C825 PCI LOCAL BUS ISA BUS S82378ZB ISA BRIDGE ETHERNET DECchip VME2PCI BRIDGE TO MPU MODULE PMC SLOT AUI 10BT VME VMEchip2 DECODE FUNCTION PC87303 SUPER I O RTC MK48T18 ESCC 85230 CIO Z8536 P2MX FUNCTION P2 CONNECTOR P1 CONNECTOR BUFFERS PARALLEL COM1 COM2 21040 ...

Page 18: ... HD26 ESCC 85230 HD26 TO MPU MODULE 10BT PMC SLOT EIA232 RJ45 AUI BUFFERS P1 CONNECTOR P2 CONNECTOR PCI LOCAL BUS ISA BUS CIO Z8536 S82378ZB ISA BRIDGE SCSI NCR 53C810 ETHERNET DECchip VME2PCI BRIDGE PC87303 SUPER I O RTC MK48T18 CSRs VME VMEchip2 PARALLEL COM1 COM2 SERIAL 4 SERIAL3 21040 ...

Page 19: ...4 Memory Mezzanine Installation 1 33 and 1 35 Install the MVME1603 1604 VMEmodule in the chassis MVME1603 1604 VMEmodule Installation 1 37 Install the transition module in the chassis MVME760 Transition Module Installation or MVME712M Transition Module Installation 1 39 or 1 42 Connect a console terminal Console Port Configuration 1 9 Connect any other equipment you will be using Connector Pin Ass...

Page 20: ...onfiguration and ensure proper operation of the MVME1603 1604 you may need to carry out certain modifications before installing the module The MVME1603 1604 provides software control over most options by setting bits in control registers after installing the MVME1603 1604 in a system you can modify its configuration The MVME1603 1604 control registers are described in Chapter 3 and or in the MVME1...

Page 21: ...manually configurable For a discussion of the configurable items on the transition module refer to the user s manual for the MVME760 part number VME760UA as necessary The MVME1600 001 has been factory tested and is shipped with the configurations described in the following sections The MVME1600 001 s required and factory installed Debug Monitor PPCBug operates with those factory settings SCSI Bus ...

Page 22: ...he MVME1600 001 is shipped from the factory with J8 set to all zeros jumpers on all pins Low Order Bit Pins Definition Bit 0 SRH0 1 2 Reserved for future use Bit 1 SRH1 3 4 With the jumper installed between pins 3 and 4 factory configuration the debugger uses the current user setup operation parameters in NVRAM When the jumper is removed making the bit a 1 the debugger uses the default setup opera...

Page 23: ...e serial port COM1 if no video terminal is found The following table shows how the display device is determined Notes If the mouse is connected but the keyboard is not and the supported VGA device exists the firmware is displayed on the video terminal Because a keyboard is necessary for interactive use on a video terminal however the firmware will display a Keyboard not connected message In order ...

Page 24: ...aking either XON OFF or via the CTS line VMEbus System Controller Selection J9 The MVME1600 001 is factory configured in system controller mode i e a jumper is installed across pins 2 and 3 of header J9 This means that the MVME1600 001 assumes the role of system controller at system power up or reset Leave the jumper installed across pins 2 and 3 if you intend to operate the MVME1600 001 as system...

Page 25: ...The factory configuration has port 3 set to receive TXC To complete the configuration of the TXC clock line you must also set serial port 3 clock configuration header J9 on the MVME760 transition module described later in this chapter For details on the configuration of that header refer to the MVME760 Transition Module section or to the user s manual for the MVME760 part number VME760UA Receive T...

Page 26: ...32 B32 C32 A1 B1 C1 J2 2 1 152 151 2 1 J14 J12 J13 2 1 3 33 34 1 2 J6 36 35 34 33 68 67 64 63 1 3 1 1 3 J10 J9 J8 16 15 2 1 2 1 J7 6 5 4 3 J5 6 5 4 3 J4 5 1 10 J3 6 15 11 J1 14 2 1 13 F1 F2 F3 F4 J11 2 1 64 63 11195 00 9502 2 3 MVME 1600 001 ABT PCI MEZZANINE CARD RST MONITOR KEYBOARD MOUSE SCSI CHS BFL CPU PCI FUS SYS 1 4 1 J15 J16 2 ...

Page 27: ...te Status and Control The MVME1600 001 front panel LEDs and switches are mounted on a removable mezzanine board Removing the LED mezzanine makes the mezzanine connector J1 a keyed double row 14 pin connector available for service as a remote status and control connector This allows a system designer to construct a RESET LED panel that can be located apart from the MVME1600 001 Maximum cable length...

Page 28: ...BORT Switch Signal goes low when the ABORT switch is pressed It may be forced low externally for a remote abort 5 PCILED PCI LED Signal goes low when the PCI LED illuminates 6 FAILLED FAIL LED Signal goes low when the FAIL LED illuminates 7 LANLED LAN LED Signal goes low when the LAN LED illuminates 8 STATLED STATUS LED Signal goes low when the STATUS LED illuminates 9 FUSELED RPWR LED Signal goes...

Page 29: ...hronous serial ports with their corresponding SIM connectors and jumper headers Port 3 is routed both to board connector J7 and to the HD26 front panel connector marked SERIAL 3 Port 4 is available only at board connector J2 Four serial interface modules are available EIA 232 D DCE and DTE EIA 530 DCE and DTE You can change Serial Ports 3 and 4 from an EIA 232 D to an EIA 530 interface or vice ver...

Page 30: ... as a DCE The jumper setting of the port should match the configuration of the corresponding SIM module When installing the SIM modules note that the headers are keyed for proper orientation For further information on the preparation of the transition module refer to the user s manual for the MVME760 part number VME760A UM as necessary 3 2 1 J8 3 2 1 J8 3 2 1 J9 3 2 1 J9 Serial Port 3 jumper setti...

Page 31: ...ector and Header Locations MVME 760 001 SERIAL 3 ETHERNET COM1 COM2 PARALLEL 10BASET 1551 9410 25 26 J2 1 2 60 59 2 1 J4 P2 A32 B32 C32 A1 B1 C1 1 5 9 6 J1 1 5 9 6 J3 13 1 25 15 J5 2 17 1 36 20 J10 2 8 1 15 9 J11 2 2 8 1 7 60 59 2 1 J6 25 26 J7 1 2 J12 J8 J9 3 1 3 1 F1 ...

Page 32: ... configurable For a discussion of the configurable items on the transition module refer to the user s manual for the MVME712M part number MVME712M as necessary The MVME1600 011 has been factory tested and is shipped with the configurations described in the following sections The required and factory installed Debug Monitor PPCBug operates with those factory settings Serial Port 4 DCE DTE Selection...

Page 33: ... P2 A32 B32 C32 A1 B1 C1 J2 152 151 2 1 J17 J12 2 1 64 63 2 8 1 7 J5 J1 14 2 1 13 F1 F2 J11 2 1 64 63 19 20 1 2 J4 J3 1 2 14 15 13 12 26 25 1 2 14 15 13 12 26 25 J16 3 33 34 1 2 J6 1 3 1 J10 J14 16 15 2 1 J15 3 1 2 J13 1 J7 J9 J8 2 1 2 1 2 1 MVME 1600 011 ABT PCI MEZZANINE CARD RST 10BASET SERIAL PORT 3 CHS BFL CPU PCI FUS SYS SERIAL PORT 4 J19 1 4 ...

Page 34: ...nications as well It can either drive using the internal clock or receive using an external clock the Receive and Transmit clock signals To select synchronous communications for the Serial Port 4 connection install jumpers on headers J8 J15 and J16 in one of the configurations shown below 3 2 1 J16 3 2 1 J16 3 2 1 J15 3 2 1 J15 Factory configuration Drive TRXC4 Signal Receive TRXC4 Signal Factory ...

Page 35: ...ion J9 On the MVME1600 011 serial port 4 s I O signals are routed to backplane connector P2 and to front panel connector J3 Header J9 determines the state of the DSR RI and TM signals on serial port 4 With a jumper installed on J9 DSR RI and TM come from the front panel With the jumper removed P2 I O is selected The DSR RI and TM signals are not supported in this case so DSR is held true while RI ...

Page 36: ... of system controller at system power up or reset Leave the jumper installed across pins 2 and 3 if you intend to operate the MVME1600 011 as system controller in all cases Remove the jumper from J10 if the MVME1600 011 is not to operate as system controller under any circumstances Note that when the MVME1600 011 is functioning as system controller the SYS LED is turned on 3 2 1 J10 Not System Con...

Page 37: ...d TM are held false General Purpose Software Readable Header J14 Header J14 provides eight readable jumpers These jumpers can be read as a register at ISA I O address 80000801 Bit 0 is associated with header pins 1 and 2 bit 7 is associated with pins 15 and 16 The bit values are read as a zero when the jumper is installed and as a one when the jumper is removed The PowerPC firmware PPCBug reserves...

Page 38: ...nfiguration the debugger uses the current user setup operation parameters in NVRAM When the jumper is removed making the bit a 1 the debugger uses the default setup operation parameters in ROM instead Refer to the ENV command description in Chapter 6 for the ROM defaults Bit 2 SRH2 5 6 Reserved for future use Bit 3 SRH3 7 8 Reserved for future use J14 2 SRH7 SRH6 SRH5 SRH1 SRH4 SRH3 SRH2 16 15 1 S...

Page 39: ...ose I O signals This allows a system designer to construct a RESET LED panel that can be located remotely from the MVME1600 011 This feature is similar to the remote connector provided on the MVME167 and MVME187 Single Board Computers maximum cable length is 15 feet The general purpose I O signals include two TTL level I O pins and one general purpose interrupt pin which can also function as a tri...

Page 40: ...0KΩ pullup line 7 RUNLED RUN LED Signal goes low when the RUN LED illuminates 8 STATLED STATUS LED Signal goes low when the STATUS LED illuminates 9 FAILLED FAIL LED Signal goes low when the FAIL LED illuminates 10 10KΩ pullup line 11 SCONLED SCON LED Signal goes low when the SCON LED illuminates 12 ABORTSW ABORT Switch Signal goes low when the ABORT switch is pressed It may be forced low external...

Page 41: ... adapter for connection to both internal and external devices Socket mounted SCSI terminating resistors for end of cable or middle of cable configurations Provision for modem connection Green LED for SCSI terminator power yellow LED for Ethernet transceiver power The features of the P2 adapter board include A 50 pin connector for SCSI cabling to the MVME712M and or to other SCSI devices Socket mou...

Page 42: ... 1 19 8 1 R51 C1 C2 C3 J2 J3 1 50 49 A1 C1 C32 A32 2 1 14 13 J1 2 1 14 13 J13 2 1 14 13 J16 2 1 14 13 J18 8 1 R50 8 1 R49 2 1 14 13 J11 2 1 14 13 J14 2 1 14 13 J17 2 1 14 13 J19 2 1 20 19 1 6 J21 J20 2 12 J15 11 1 2 49 50 DS2 DS1 J5 J4 cb228 9212 ETHERNET PRINTER MVME712M SERIAL PORT 1 CONSOLE SERIAL PORT 3 SERIAL PORT 2 TTY01 SERIAL PORT 4 SCSI INTERFACE PRIMARY SIDE 36 ...

Page 43: ...heir corresponding jumper headers Serial Port 4 Clock Configuration Port 4 can be configured via J15 Figure 1 7 to use the TrxC4 and RtxC4 signal lines Part of the configuration must be done with headers J8 J15 and J16 on the MVME1600 011 Figure 1 8 Figure 1 7 J15 Clock Line Configuration Serial Port Board Connector Panel Connector Jumper Header Port 1 J7 SERIAL PORT 1 CONSOLE J1 J11 Port 2 J8 SER...

Page 44: ...NSITION BOARD TXD DTR RTS RTXC RRXC TTXC GND RXD DCD CTS DB25 2 20 4 15 17 24 7 3 8 5 11202 00 9502 TRXC4 RTXC4 J15 1 TXDB RTSB RXDB CTSB RXDB DCDB CTSB TRXCB TXD RTS RXD CTS DCD TXCI TXCO RXCI DCDB RTXCB 2 4 3 5 8 15 24 17 FRONT HD26 PANEL Z8536 CIO PB5 DTR4 PB3 LLB4 PB4 RLB4 PB1 DSR4 PB2 RI4 PB0 TM4 DTR LLB RLB DSR RI TM GND J15 J16 20 18 21 6 22 25 7 J8 ...

Page 45: ...illustrates the location of the resistors fuse and connectors For further information on the preparation of the transition module and the P2 adapter refer to the user s manual for the MVME712M part number MVME712M as necessary Figure 1 9 P2 Adapter Component Placement C1 B1 A1 C32 B32 A32 2 1 50 49 R2 R3 R1 C1 C2 C3 F1 P2 CR1 1 1 2 A1 B1 C1 A32 B32 C32 J2 J3 cb211 9212 ...

Page 46: ... necessary to install mezzanines on the base board refer to the following sections for a brief description of the installation procedure If necessary you can find additional information in the user s manuals for the individual mezzanine cards ESD Precautions Motorola strongly recommends that you use an antistatic wrist strap and a conductive foam pad when installing or upgrading a system Electroni...

Page 47: ...dules with power applied may result in damage to module components Warning Dangerous voltages capable of causing death are present in this equipment Use extreme caution when handling testing and adjusting 3 Carefully remove the MVME1603 1604 from its VMEbus card slot and lay it flat with connectors P1 and P2 the rear panel facing you Caution Avoid touching areas of integrated circuitry static disc...

Page 48: ...PM603 604 Processor Memory Mezzanine 1 34 1 Figure 1 10 PM603 PM604 Placement on MVME1603 1604 J3 J5 J2 J4 PM603 PM604 11197 00 9411 1 2 ...

Page 49: ...The RAM104 DRAM mezzanine mounts on top of the PM603 or PM604 processor memory mezzanine To install a RAM104 mezzanine refer to Figure 1 11 and proceed as follows 1 Attach an ESD strap to your wrist Attach the other end of the ESD strap to the chassis as a ground The ESD strap must be secured to your wrist and to ground throughout the procedure 2 Perform an operating system shutdown Turn the AC or...

Page 50: ...RAM104 Memory Mezzanine Installation 1 36 1 Figure 1 11 RAM104 Placement on PM603 PM604 J2 J5 J2 J1 PM603 PM604 RAM104 ...

Page 51: ...setting the RAM104 on the PM603 PM604 6 Place the RAM104 mezzanine module on top of the PM603 or PM604 mezzanine Do NOT press the boards together yet 7 Visually verify that the male guide pins on the RAM104 connectors are aligned with the female guide pins on the PM603 PM604 connectors You can only see the guide pins from the sides Do NOT press the boards together yet Caution Failure to properly a...

Page 52: ... as a ground The ESD strap must be secured to your wrist and to ground throughout the procedure 2 Perform an operating system shutdown Turn the AC or DC power off and remove the AC cord or DC power lines from the system Remove chassis or system cover s as necessary for access to the VMEmodules Caution Inserting or removing modules with power applied may result in damage to module components Warnin...

Page 53: ... On the chassis backplane remove the INTERRUPT ACKNOWLEDGE IACK and BUS GRANT BG jumpers from the header for the card slot occupied by the MVME1603 1604 Note Some VME backplanes e g those used in Motorola Modular Chassis systems have an autojumpering feature for automatic propagation of the IACK and BG signals Step 6 does not apply to such backplane designs 7 Replace the chassis or system cover s ...

Page 54: ...iller panel s from the appropriate card slot s at the front or rear of the chassis You may need to shift other modules in the chassis to allow space for the cables connected to the MVME760 transition module 4 Attach the flat ribbon cable supplied with the MVME760 to the P2 backplane connector at the slot occupied by the MVME1600 001 base board Route the cable to P2 on the transition module Be sure...

Page 55: ...with the MVME760 you may need to fabricate or purchase certain cables Motorola recommends shielded cable for all peripheral connections to minimize radiation Figure 1 12 MVME760 MVME1600 001 Cable Connections P2 P2 P1 ENCLOSURE BOUNDARY MVME760 MVME1600 001 J1 J3 J5 J10 J11 J12 1548 9412 P2 ...

Page 56: ...r s as necessary for access to the VMEmodules Caution Inserting or removing modules with power applied may result in damage to module components Warning Dangerous voltages capable of causing death are present in this equipment Use extreme caution when handling testing and adjusting 3 Remove the filler panel s from the appropriate card slot s at the front or rear of the chassis You may need to shif...

Page 57: ...ations Figure 1 13 shows a possible configuration for use with internal SCSI devices For more detailed information on installing the P2 adapter board and the MVME712M transition module refer to the MVME712M Transition Module and P2 Adapter Board User s Manual 8 Replace the chassis or system cover s making sure no cables are pinched Cable the peripherals to the panel connectors reconnect the system...

Page 58: ...2M MVME1600 011 Cable Connections J6 J2 SCSI DEVICE MVME1600 011 P1 P2 J3 ENCLOSURE BOUNDARY TERMINATORS INSTALLED TERMINATORS REMOVED 50 CONDUCTOR CABLE TERMINATORS INSTALLED MVME712M cb2349301 SCSI DEVICE P2 ADAPTER P2 T J3 J2 J9 J7 J8 J10 J4 J5 64 CONDUCTOR CABLE ...

Page 59: ... processor and offboard VMEbus devices see this local DRAM at base physical address 00000000 as programmed by the PPCBug firmware This may be changed via software to any other base address Refer to the MVME1603 MVME1604 Single Board Computer Programmer s Reference Guide for more information If the MVME1603 1604 tries to access offboard resources in a nonexistent location and is not system controll...

Page 60: ...01 Base Board The MVME1600 001 base board furnishes 12Vdc 12Vdc and 5Vdc power to the MVME760 transition module through polyswitches resettable fuses F4 F2 and F3 The MVME760 uses these voltage sources to power the serial port drivers and any LAN transceivers connected to the transition module The FUS LED DS5 on the MVME1600 001 front panel illuminates when all three voltages are available The fus...

Page 61: ...panel making it unnecessary to share the LED mezzanine connector for that purpose If none of the LEDs light and the ABORT and RESET switches do not operate check fuse F1 The MVME1600 011 base board provides 12Vdc power to the Ethernet transceiver interface through a 1A fuse F2 located between P1 and P2 The FUS LED lights to indicate that 12Vdc is available With the MVME712M transition module conne...

Page 62: ...4 pin LED mezzanine connector J1 Unlike the MVME1600 001 base board the MVME1600 011 also applies the SPEAKER_OUT signal to the dedicated remote status and control connector J4 The LED mezzanine need not be removed to cable the SPEAKER_OUT signal to an external speaker For the pin assignments of J4 refer to Table 1 3 ...

Page 63: ... previously placed in System mode it displays the prompt PPC1 Diag performs self tests and tries to autoboot You can press ESC to skip the self tests or press ABORT or BREAK to interrupt them For further information on the PPCBug firmware refer to Chapter 5 PPCBug Appendix D Troubleshooting CPU Boards or to the PPCBug Firmware Package User s Manual The MVME1603 1604 front panel has ABORT and RESET...

Page 64: ... asserting the VMEbus signal SYSRESET A SYSRESET signal may be generated by the RESET switch a power up reset a watchdog timeout or by a control bit in the LCSR in the VMEchip2 SYSRESET remains asserted for at least 200 ms as required by the VMEbus specification Similarly the VMEchip2 supplies an input signal and a control bit to initiate a local reset operation By setting a control bit software c...

Page 65: ...he PCI bus is active This indicates that the PCI mezzanine if installed is active FUS DS5 green Fuse OK lights when 5Vdc 12Vdc and 12Vdc power is available from the base board to the transition module and remote devices Note The circuitry monitored by the FUS LED differs between the MVME1600 001 and MVME1600 011 versions of the base board The differences are detailed under the respective base boar...

Page 66: ...s by the Transfer Type TT signals The local resources respond to the normal access and interrupt acknowledge codes Normal Address Range The memory map of devices that respond to the normal address range is shown in the following tables The normal address range is defined by the TT signals on the MPU bus For the MVME1603 1604 transfer types 0 1 and 2 define the normal address range Table 2 1 define...

Page 67: ...pace Mapping table for more details 7 A read of any byte within this 16 byte range BFFFFFF0 through BFFFFFFF causes a PCI IACK cycle The data read is the IACK vector Table 2 1 Processor View of the Memory Map Processor Address Size PCI Address Generated Definition Notes Start End Start End 00000000 7FFFFFFF 2GB DRAM Not Forwarded to PCI 80000000 807FFFFF 8MB 00000000 007FFFFF ISA PCI I O Space 1 2...

Page 68: ...80800900 80800FFF 00800900 00800FFF Reserved A12 80801000 808010FF 00801000 008010FF 53C810 825 Configuration Registers SCSI 80801100 80801FFF 00801100 00801FFF Reserved A13 80802000 808020FF 00802000 008020FF VME2PCI Configuration Registers VMEbus 80802100 80803FFF 00802100 00803FFF Reserved A14 80804000 808040FF 00804000 008040FF DECchip 21040 Configuration Registers Ethernet 80804100 80807FFF 0...

Page 69: ...0077 8000 3017 NVRAM RTC Data Port 0080 0090 8000 0080 8000 0090 8000 4000 8000 4010 IBC DMA Page Registers 2 0092 8000 0092 8000 4012 IBC Port 92 Register 2 0094 009F 8000 0094 8000 009F 8000 4014 8000 401F IBC DMA Page Registers 2 00A0 00A1 8000 00A0 8000 00A1 8000 5000 8000 5001 IBC Interrupt 2 Control Mask 2 00C0 00CF 8000 00C0 8000 00CF 8000 6000 8000 600F IBC DMA2 Address Registers 2 00D0 00...

Page 70: ...8000 0801 8004 0001 Software Readable Header 4 0802 8000 0802 8004 0002 Board Configuration Register 4 0803 8000 0803 8004 0003 Reserved 4 0804 8000 0804 8004 0004 DRAM Size Register 4 6 0805 8000 0805 8004 0005 Reserved 4 0806 8000 0807 8004 0006 Reserved 4 0807 8000 0807 8004 0007 Reserved 4 0820 8000 0820 8004 1000 Reserved for Cooling Monitor 4 0830 8000 0830 8004 1010 Reserved for Audio 4 084...

Page 71: ...e board comes up in contiguous mode Contiguous and discontiguous modes are programmed by the MPC105 PCI bridge memory controller Caution The PPCBug debugger and several operating systems execute in contiguous mode If this is changed to discontiguous mode PPCBug will cease to function correctly PCI Local Bus Memory Map Table 2 4 shows the mapping of onboard resources from the point of view of the P...

Page 72: ...cludes a user programmable map decoder for the VMEbus to local bus interface The map decoder enables you to program the starting and ending address and the modifiers to which the MVME1603 1604 responds The VMEchip2 also includes a user programmable map decoder for the GCSRs global control status registers accessible from both the VMEbus and the local bus The GCSR map decoder allows you to program ...

Page 73: ...8080200E 0080200E PCI Header Type R 00h 80802010 00802010 PCI I O Base Address R W 00000001h 80802014 00802014 PCI Memory Base Address R W 00000000h 8080203C 0080203C PCI Interrupt Line R W 00h 8080203D 0080200D PCI Interrupt Pin R 01h 8080203E 0080200E PCI Minimum Grant R 00 8080203F 0080200F PCI Maximum Latency R 00 80802040 00802040 Slave Starting Address 1 R W 0000h 80802042 00802042 Slave End...

Page 74: ... TRANSLATION ADDRESS 4 VMEchip2 LCSR Base Address BASE 0000 OFFSET 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 MAST D16 EN MAST WP EN MAST D16 EN MAST WP EN MASTER AM 3 MASTER AM 4 GCSR GROUP SELECT GCSR BOARD SELECT MAST 4 EN MAST 3 EN MAST 2 EN MAST 1 EN TICK 2 1 TICK IRQ 1 EN CLR IRQ IRQ STAT VME...

Page 75: ...NSLATION SELECT 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 IO2 EN IO2 WP EN IO2 S U IO2 P D IO1 EN IO1 D16 EN IO1 WP EN IO1 S U 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 MASTER AM 2 MASTER AM 1 ROM SIZE ROM BANK B SPEED ROM BANK A SPEED DMA TBL INT DMA LB SNP MODE DMA INC VME DMA INC LB DMA D64 BLK DMA BLK DMA AM 5 DMA AM 4 DMA WRT DMA D16 DMA AM 3 DMA AM 2 DMA AM 1 ...

Page 76: ... TIC1 IRQ VME IACK IRQ DMA IRQ SIG3 IRQ SIG2 IRQ SIG1 IRQ SIG0 IRQ LM1 IRQ LM0 IRQ ABORT IRQ LEVEL SYS FAIL IRQ LEVEL MST WP ERROR IRQ LEVEL VME IACK IRQ LEVEL DMA IRQ LEVEL SIG 3 IRQ LEVEL SIG 2 IRQ LEVEL SW7 IRQ LEVEL SW6 IRQ LEVEL SW5 IRQ LEVEL SW4 IRQ LEVEL SPARE IRQ LEVEL VME IRQ 7 IRQ LEVEL VME IRQ 6 IRQ LEVEL VME IRQ 5 IRQ LEVEL VECTOR BASE REGISTER 0 VECTOR BASE REGISTER 1 MST IRQ EN SYS F...

Page 77: ...2 CLR IRQ 11 CLR IRQ 10 CLR IRQ 9 CLR IRQ 8 SET IRQ 15 SET IRQ 14 SET IRQ 13 SET IRQ 12 SET IRQ 11 SET IRQ 10 SET IRQ 9 SET IRQ 8 SW7 IRQ SW6 IRQ SW5 IRQ SW4 IRQ SW3 IRQ SW2 IRQ SW1 IRQ SW0 IRQ SPARE VME IRQ7 VME IRQ6 VME IRQ5 VME IRQ4 VME IRQ3 VME IRQ2 VME IRQ1 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GPIOO P ERROR IRQ LEVEL IRQ1E IRQ LEVEL TIC TIMER 2 IRQ LEVEL TIC TIMER 1 IRQ LEVEL SW3 IRQ LEVEL S...

Page 78: ...us interrupt request registers VMEchip2 GCSR Base Address BASE 0100 Offsets VME bus Local Bus 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0 0 CHIP REVISION CHIP ID 2 4 LM3 LM2 LM1 LM0 SIG3 SIG2 SIG1 SIG0 RST ISF BF SCON SYSFL X X X 4 8 GENERAL PURPOSE CONTROL AND STATUS REGISTER 0 6 C GENERAL PURPOSE CONTROL AND STATUS REGISTER 1 8 10 GENERAL PURPOSE CONTROL AND STATUS REGISTER 2 A 14 GENERAL PURPOSE CO...

Page 79: ...ation modes of fixed priority rotating priority and mixed priority The IBC registers that control the arbitration mode are the PCI Arbiter Priority Control PAPC Register and the PCI Arbiter Priority Control Extension ARBPRIX Register The PAPC register and the ARBPRIX register default to 04 hex and 00 hex respectively This default configuration puts the CPU MPC105 at the highest priority level Refe...

Page 80: ...UREQ IBCREQ REQ0 REQ1 REQ2 REQ3 PCI MASTER CPU MPC105 IBC Internal SCSI 53C825 LANC DECchip 21040 VME VME2PCI PMC Slot BANK 0 11187 00 9411 BANK 3 BANK 1 IBCREQ INTERNAL TO IBC REQ0 0 1 0 1 0 1 FIXED CONTROL BANK 0 ROTATE CONTROL BANK 0 FIXED CONTROL BANK 3 ROTATE CONTROL BANK 3 FIXED CONTROL BANK 1 ROTATE CONTROL BANK 1 REQ1 REQ2 CPUREQ REQ3 00 01 10 BANK 2 FIXED CONTROL BANK 2 A FIXED CONTROL BA...

Page 81: ...pports both maskable and non maskable interrupts The following figure illustrates the interrupt architecture Figure 2 2 MVME1603 MVME1604 Interrupt Architecture 11188 00 9411 INT INT IBC MPC603 OR MPC604 NMI MPC105 MCP SERR PERR PCI INTERRUPTS ISA INTERRUPTS HOST CONNECTORS ...

Page 82: ...se 15 interrupts are ISA type interrupts that are functionally equivalent to two 82C59 interrupt controllers Except for IRQ0 IRQ1 IRQ2 IRQ8 and IRQ13 each of the interrupt lines can be configured for either edge sensitive or level sensitive mode by programming the appropriate ELCR registers in the IBC The IBC also supports four PCI interrupts INT3 INT0 The IBC has four PIRQ Route Control Registers...

Page 83: ...TROL REGISTER PIRQ0 IRQx PIRQ ROUTE CONTROL REGISTER PIRQ1 IRQx PIRQ ROUTE CONTROL REGISTER PIRQ2 IRQx PIRQ ROUTE CONTROL REGISTER PIRQ3 IRQx CONTROLLER 1 INT1 TIMER1 COUNTER0 0 1 2 3 4 5 6 7 IRQ1 IRQ3 IRQ4 IRQ5 IRQ6 IRQ7 CONTROLLER 2 INT2 IRQ8 0 1 2 3 4 5 6 7 IRQ9 IRQ11 IRQ12 IRQ13 IRQ14 IRQ15 INTR IRQ10 ...

Page 84: ...l and Status Register in the VME2PCI ASIC Finally to get the interrupt vector from the VMEchip2 the interrupt handling routine must read the appropriate Pseudo IACK Registers Z8536 and Z85230 Interrupts After learning from the IBC that the source of the interrupt is the Z85230 Z8536 devices the software can either poll the two devices or perform an 8 bit read access to the Z85230 Z8536 Pseudo IACK...

Page 85: ...the ISASIO ISA Super I O device 5 Reset sources from the VMEchip2 the VMEbus SYSRESET Watchdog Reset and Software Reset functions Table 2 8 IBC DMA Channel Assignments IBC Priority IBC Label Controller DMA Assignment DMA Request Polarity 1 Channel 0 DMA1 Serial Port 3 Receiver Z85230 Port A Rx High 2 Channel 1 Serial Port 3 Transmitter Z85230 Port A Tx High 3 Channel 2 Reserved for Floppy Drive Co...

Page 86: ...ory Domain The MPC603 604 processor can operate in both big endian and little endian mode However it always treats the external processor memory bus as big endian by performing address rearrangement and reordering when running in little endian mode Role of the MPC105 Because the PCI bus is little endian the MPC105 performs byte swapping in both directions from PCI to memory and from the processor ...

Page 87: ...ting Instructions 2 25 2 Figure 2 4 Big Endian Mode N WAY BYTE SWAP VMEchip2 MPC105 VME2PCI BIG ENDIAN LITTLE ENDIAN LITTLE ENDIAN BIG ENDIAN PCI VMEbus DRAM N WAY BYTE SWAP 11190 00 9411 BIG ENDIAN PROGRAM ...

Page 88: ...2 Figure 2 5 Little Endian Mode 11191 00 9411 N WAY BYTE SWAP VMEchip2 MPC105 VME2PCI BIG ENDIAN LITTLE ENDIAN LITTLE ENDIAN BIG ENDIAN PCI VMEbus DRAM EA MODIFICATION LITTLE ENDIAN BIG ENDIAN EA MODIFICATION XOR LITTLE ENDIAN PROGRAM ...

Page 89: ... address in memory is the first one to be transferred regardless of the endian mode Since the MPC105 maintains address invariance in both little endian and big endian mode there should be no endian issues for the Ethernet data Big endian software must still be aware of the byte swapping effect when accessing the registers of the DEC21040 however GD5446 Graphics Big endian graphic software must tak...

Page 90: ...rst by the VME2PCI and then by the MPC105 The result has the desirable effect of being transparent to the big endian software In little endian mode however software must take the byte swapping effect of the VME2PCI and the address reverse rearranging effect of the MPC105 into account ...

Page 91: ... Refer to it for a functional description of the MVME1603 MVME1604 in greater depth Features The following table summarizes the features of the MVME1600 001 and MVME1600 011 based MVME1603 MVME1604 single board computers Table 3 1 MVME1603 MVME1604 Features Feature Description Models Microprocessor MPC603 PowerPCTM processor MVME1603 MPC604 PowerPCTM processor MVME1604 2 slots DRAM Up to 64MB on p...

Page 92: ... MVME1600 011 base board Parallel I O IEEE1284 Bidirectional parallel port PC87303 SIO via P2 and transition module All models SCSI I O 16 bit SCSI interface NCR 53C825 via front panel MVME1600 001 base board 8 bit SCSI interface NCR 53C810 via P2 and MVME712M transition module MVME1600 011 base board Ethernet I O AUI and 10BaseT connections via P2 and MVME760 transition module MVME1600 001 base b...

Page 93: ...n the Features section The MVME1603 MVME1604 offers many standard features desirable in a computer system such as synchronous and asynchronous serial ports parallel port boot ROM and DRAM SCSI Ethernet provision for a disk drive mezzanine and MVME1600 001 base board only keyboard mouse and graphics Floppy disk controller Support for floppy disk drive PC87303 SIO via connectors on base board All mo...

Page 94: ...us peripherals the PCI bus supports an industry standard mezzanine interface IEEE P1386 1 PMC PCI Mezzanine Card PMC modules offer a variety of possibilities for I O expansion through FDDI Fiber Distributed Data Interface ATM Asynchronous Transfer Mode graphics Ethernet or SCSI ports Both base boards support PMC front panel I O Block Diagram Figure 3 1 is a block diagram of the MVME1603 MVME1604 s...

Page 95: ...chip2 SCSI NCR 53C8xx ETHERNET DECchip VGA CL GD5446 32 BIT PCI LOCAL BUS PCI EXPANSION PMC SLOT MVME1600 001 011 BASE BOARD MOUSE KEYBOARD SERIAL PARALLEL I O NOTES 1 SHADED BOXES ARE MVME1600 001 FEATURES ONLY 2 SCSI CONTROLLER IS NCR 53C825 ON MVME1600 001 NCR 53C810 ON 011 FLOPPY DISK CONTROLLER VIDEO RAM 21040 L2 CACHE OPTIONAL MPC105 ISA BRIDGE 11186 00 9606 ...

Page 96: ...e effects of VMEbus signal noise at P2 The SCSI bus is 16 bits wide in MVME1600 001 based versions of the MVME1603 MVME1604 and 8 bits wide in MVME1600 011 based versions Refer to Chapter 4 for the pin assignments of the MVME1600 001 front panel SCSI connector Refer to the MVME712M User s Manual for the pin assignments of the transition module SCSI connectors used in the MVME1600 011 SCSI implemen...

Page 97: ...tions respectively see Figure 1 4 on page 1 17 The MVME1600 011 base board uses an 8 pin RJ45 on its front panel for 10BaseT lines see Figure 1 5 on page 1 19 and routes its AUI lines through the P2 connector to the MVME712M transition module as illustrated in Figure 1 13 on page 1 44 The MVME712M front panel has an industry standard DB15 connector for the AUI connections see Figure 1 6 on page 1 ...

Page 98: ... do the following 1 Bring the MVME1603 MVME1604 up in PPCBug 2 Remove the current Ethernet cable and connect the one you wish to use 3 Reset the MVME1603 MVME1604 by pressing the RESET switch or typing the debug command RESET The new connection is automatically recognized by the LAN controller Graphics Interface MVME1600 001 based versions of the MVME1603 MVME1604 have a Super VGA Video Graphics A...

Page 99: ...lities for I O expansion through FDDI Fiber Distributed Data Interface ATM Asynchronous Transfer Mode graphics Ethernet or SCSI ports Both versions of the base board support PCI front panel I O The MVME1603 MVME1604 supports one PMC slot Two 64 pin connectors on the base board J11 and J12 interface with 32 bit IEEE P1386 1 PMC compatible mezzanines to add any desirable function The PCI Mezzanine C...

Page 100: ...ssions in the MVME1603 MVME1604 Programmer s Reference Guide ISA Super I O Device ISASIO The MVME1603 MVME1604 uses a PC87303 ISASIO chip from National Semiconductor to implement certain segments of the P2 and front panel I O Two asynchronous serial ports COM1 and COM2 via P2 and transition module IEEE1284 bidirectional parallel port via P2 and transition module Disk drive support via drive connec...

Page 101: ...ndor documentation for the ISASIO device Parallel Port The parallel port is an IEEE P1284 printer interface implemented with the ISASIO device All parallel I O interface signals are routed to P2 through series damping resistors Hardware initializes the parallel port as PPT1 with an ISA IO base address of 3BC This default configuration also assigns the parallel port to IBC ISA PCI Bridge Controller...

Page 102: ...itten for those devices may be used without change to operate the ISASIO controller The ISASIO device may be used to support any of the following devices 31 2 inch 1 44MB floppy disk drive 51 4 inch 1 2MB floppy disk drive Standard 250kbps to 2Mbps tape drive system Keyboard and Mouse Interface On the MVME1600 001 base board the ISASIO device provides ROM based keyboard and mouse interface control...

Page 103: ... Three interval counters timers The base address of the configuration space for the ISA bridge controller is at 00800800 in the PCI Configuration area Real Time Clock and NVRAM The MVME1603 MVME1604 employs an SGS Thomson surface mount M48T18 RAM and clock chip to provide 8KB of non volatile static RAM and a real time clock This chip provides a clock oscillator crystal power failure detection memo...

Page 104: ...ammed in Figure 1 1 and Figure 1 2 for the two base boards and the VMEchip2 They can be programmed to generate periodic interrupts to the processor Interval Timers The ISA bridge controller has three built in counters that are equivalent to those found in an 82C54 programmable interval timer These counters are grouped into one timer unit Timer 1 in the IBC Each counter output has a specific functi...

Page 105: ... the VMEchip2 may not be present in all versions of the MVME1603 MVME1604 module Serial Communications Interface The MVME1603 MVME1604 uses a Zilog Z85230 ESCC Enhanced Serial Communications Controller to implement the two synchronous asynchronous serial communications interfaces which are routed through P2 for the MVME1600 001 base board and through the front panel for the MVME1600 011 base board...

Page 106: ... s Reference Guide for further information Z8536 CIO Device The Z8536 CIO device complements the Z85230 ESCC by supplying signals for Abort interrupt status fuse status and SCSI terminator status and control as well as furnishing modem control lines not provided by the Z85230 ESCC In addition the Z8536 CIO device has three independent 16 bit counters timers For MVME1600 001 base boards the Z8536 C...

Page 107: ...ed GFXP Graphics present If set no graphics interface is installed If cleared onboard graphics are available MVME1600 001 base board only the MVME1600 011 has no graphics capability LANP Ethernet present If set no Ethernet transceiver interface is installed If cleared there is on board Ethernet support SCSIP SCSI present If set there is no on board SCSI interface If cleared on board SCSI is suppor...

Page 108: ...ansition module uses MXSYNC to synchronize with the base board A 16 to 1 multiplexing scheme is used with MXCLK s 10MHz bit rate Sixteen time slots are defined and allocated as follows Table 3 2 P2 Multiplexing Sequence MXDO From Base Board MXDI From MVME760 Time Slot Signal Name Time Slot Signal Name 0 RTS3 0 CTS3 1 DTR3 1 DSR3 MID1 2 LLB3 MODSEL 2 DCD3 3 RLB3 3 TM3 MID0 4 RTS4 4 RI3 5 DTR4 5 CTS...

Page 109: ...ally used to abort program execution and return control to the PPCBug debugger firmware located in the MVME1603 1604 EPROM and Flash memory The interrupt signal reaches the processor module via ISA bus interrupt line IRQ8 The signal is also available at pin PB7 of the Z8536 CIO device which handles various status signals serial I O lines and counters The interrupter connected to the ABORT switch i...

Page 110: ...in the VMEchip2 SYSRESET remains asserted for at least 200 ms as required by the VMEbus specification Similarly the VMEchip2 provides an input signal and a control bit to initiate a local reset operation By setting a control bit software can maintain a board in a reset state disabling a faulty board from participating in normal system operation The local reset driver is enabled even when the VMEch...

Page 111: ...he PCI bus is active This indicates that the PCI mezzanine if installed is active FUS DS5 green Fuse OK lights when 5Vdc 12Vdc and 12Vdc power is available from the base board to the transition module and remote devices Note The circuitry monitored by the FUS LED differs between the MVME1600 001 and MVME1600 011 versions of the base board The differences are detailed under the respective base boar...

Page 112: ...er the serial port drivers and any LAN transceivers connected to the transition module The FUS LED DS5 on the MVME1600 001 front panel illuminates when all three voltages are available The fused 5Vdc power is also supplied to the base board s keyboard and mouse connectors and to the 14 pin combined LED mezzanine remote reset connector J1 In addition the MVME1600 001 base board provides 5Vdc to the...

Page 113: ...k fuse F1 The MVME1600 011 base board provides 12Vdc power to the Ethernet transceiver interface through a 1A fuse F2 located between P1 and P2 The FUS LED lights to indicate that 12Vdc is available With the MVME712M transition module connected the yellow DS1 LED on the MVME712M also signals the availability of LAN power indicating in turn that the fuse is good If the Ethernet transceiver fails to...

Page 114: ... is the processor memory mezzanine module that together with an LED mezzanine an optional RAM104 DRAM module and an optional PCI mezzanine card plugs into the MVME1600 001 or MVME1600 011 base board to make a complete single board computer See Figure 1 10 You have the choice of a PowerPC603 module the PM603 or a PowerPC604 module the PM604 with from 8MB to 64MB of DRAM or up to 128MB of DRAM with ...

Page 115: ...es in the Flash chips PPCBug provides A boot loader and extensive onboard diagnostics A single line assembler disassembler The capability to save and restore a configuration through NVRAM A remote boot capability Under normal operation the Flash devices are in read only mode their contents are pre defined and they are protected against inadvertent writes due to loss of power conditions However for...

Page 116: ... 1 11 RAM104 modules of 8 16 32 or 64MB are available for memory expansion There is no parity or ECC protection on the DRAM The addition of the memory module on the processor memory module makes a stack three boards high An MVME1603 SBC maintains a single VME slot width with this stacking although it does brush the inter card buffer zone MVME1604 SBCs have a heatsink on the PowerPC604 that extends...

Page 117: ... SIMs used in conjunction with the appropriate jumper settings The SIMs are small plug in printed circuit boards which contain all the circuitry needed to convert a TTL level port to the standard voltage levels needed by various industry standard serial interfaces such as EIA 232 EIA 530 etc The following types of SIMs are available For additional information about serial interface modules refer t...

Page 118: ...ction to both internal and external devices Socket mounted SCSI terminating resistors for end of cable or middle of cable configurations Provision for modem connection Green LED for SCSI terminator power yellow LED for Ethernet transceiver power The features of the P2 adapter board include A 50 pin connector for SCSI cabling to the MVME712M and or to other SCSI devices Socket mounted SCSI terminat...

Page 119: ...base board Connector Table LED Mezzanine connector 4 1 MPU Mezzanine connector 4 2 CPU connector 4 3 DRAM Mezzanine connectors 4 4 4 5 PCI Mezzanine connector 4 6 VMEbus connector P1 4 7 Ethernet 10BaseT connector 4 8 Disk Drive connector 4 9 Connector Table VMEbus P2 connector 4 10 SCSI connector 4 11 Graphics connector 4 12 Keyboard and Mouse connectors 4 13 4 14 Ethernet AUI connector MVME760 4...

Page 120: ...3 MVME1604 SBC or the support information sections of the MVME760 or MVME712M transition module documentation as necessary Common Connectors The following tables describe connectors used with the same pin assignments by both the MVME1600 001 and the MVME1600 011 base boards Connector Table VMEbus P2 connector 4 19 SCSI connector at MVME712M 4 20 Ethernet AUI connector 4 21 Parallel I O connector 4...

Page 121: ...surface mount socket strip The pin assignments are as follows MPU Mezzanine Connector A 152 pin connector J14 on the MVME1600 001 base board J17 on the MVME1600 011 supplies the interface between the base board and the MPU mezzanine module The pin assignments are listed in the following table Table 4 1 LED Mezzanine Connector 1 GND RESETSW 2 3 IRQ_5 ABORTSW 4 5 PCILED FAILLED 6 7 LANLED STATLED 8 ...

Page 122: ...SCC_IRQ 22 23 FLPYIRQ IRQ_B 24 25 SMI SRESET 26 27 NMI LBRESET 28 29 TBEN PURESET 30 31 TCK TDO1 32 33 TDI1 TMS 34 35 PMCP TRST 36 37 PMCREQ PMCGNT 38 39 ISA_MSTR FLSHREQ 40 41 SD7 FLSHACK 42 43 SD6 Reserved 44 45 SD5 RAMCFG 46 47 SD4 CPUCNFG 48 49 SD3 X_IOR 50 51 SD2 X_IOW 52 53 SD1 SA1 54 55 SD0 SA0 56 57 12V 5V 12V 58 59 SERR PERR 60 61 SDONE LOCK 62 63 SBO DEVSEL 64 65 GND GND 66 67 IRDY TRDY ...

Page 123: ... 106 107 AD24 AD25 108 109 AD26 AD27 110 111 AD28 AD29 112 113 AD30 AD31 114 115 PCI_RESV5 PAR64 116 117 CBE4 CBE5 118 119 CBE6 CBE7 120 121 AD32 AD33 122 123 AD34 AD35 124 125 AD36 AD37 126 127 AD38 AD39 128 129 AD40 AD41 130 131 AD42 AD43 132 133 AD44 3 3V AD45 134 135 AD46 AD47 136 137 AD48 AD49 138 139 AD50 AD51 140 141 AD52 AD53 142 143 AD54 AD55 144 145 AD56 AD57 146 147 AD58 AD59 148 149 AD...

Page 124: ...ocessor memory mezzanine module provides access to the processor bus MPU bus and some MPC105 bridge memory controller signals It can be used to add L2 cache memory refer to the PM603 PM604 User s Manual or to upgrade the processor The pin assignments are listed in the following table ...

Page 125: ...PA23 24 25 PA24 PA25 26 27 PA26 PA27 28 29 PA28 PA29 30 31 PA30 PA31 32 33 PA_PAR0 PA_PAR1 34 35 PA_PAR2 PA_PAR3 36 37 APE RSRV 38 39 PD0 PD1 40 41 PD2 PD3 42 43 PD4 PD5 44 45 PD6 PD7 46 47 PD8 PD9 48 49 PD10 PD11 50 51 PD12 PD13 52 53 PD14 PD15 54 55 PD16 PD17 56 57 PD18 5V PD19 58 59 PA20 PD21 60 61 PD22 PD23 62 63 PD24 PD25 64 65 PD26 PD27 66 67 PD28 PD29 68 69 PD30 PD31 70 71 PD32 PD33 72 73 P...

Page 126: ...08 109 PDPAR6 PDPAR7 110 111 No Connection No Connection 112 113 DPE DBDIS 114 115 TT0 TSIZ0 116 117 TT1 TSIZ1 118 119 TT2 TSIZ2 120 121 TT3 TC0 122 123 TT4 TC1 124 125 CI TC2 126 127 WT CSE0 128 129 GLOBAL CSE1 130 131 SHARED DBWO 132 133 AACK 3 3V TS 134 135 ARTY XATS 136 137 DRTY TBST 138 139 TA No Connection 140 141 TEA No Connection 142 143 No Connection DBG 144 145 No Connection DBB 146 147 ...

Page 127: ...WE1 HALTED N C 164 165 L2HIT TLBISYNC 166 167 L2TALE TBEN 168 169 L2TALOE SUSPEND 170 171 L2TOE GND DRVMOD0 172 173 L2TWE DRVMOD1 N C 174 175 L2TV NAPRUN N C 176 177 L2PRSNT1 QREQ 178 179 SRESET QACK 180 181 HRESET CPUTDO 182 183 GND CPUTDI 184 185 CPUCLK1 CPUTCK 186 187 CPUCLK2 CPUTMS 188 189 CPUCLK3 CPUTRST 190 Table 4 3 CPU Connector Continued ...

Page 128: ...10 59 GND BMD3 60 11 MA_BB7 GND 12 61 BMD4 GND 62 13 GND MA_BB8 14 63 GND BMD5 64 15 MA_BB9 MA_BB10 16 65 BMD6 5V 66 17 MA_BB11 GND 18 67 5V BMD7 68 19 GND BWEB2 20 69 BMD8 GND 70 21 BRASB0 GND 22 71 GND BMD9 72 23 GND BRASB1 24 73 BMD10 5V 74 25 BRASB2 GND 26 75 5V BMD11 76 27 GND BRASB3 28 77 BMD12 GND 78 29 BRASB4 GND 30 79 GND BMD13 80 31 GND BRASB5 32 81 BMD14 5V 82 33 BRASB6 GND 34 83 5V BMD...

Page 129: ...48 52 3 GND BMD24 4 53 BMD49 GND 54 5 BMD25 GND 6 55 GND BMD50 56 7 GND BMD26 8 57 BMD51 3 3V 58 9 BMD27 GND 10 59 3 3V BMD52 60 11 GND BMD28 12 61 BMD53 GND 62 13 BMD29 GND 14 63 GND BMD54 64 15 GND BMD30 16 65 BMD55 3 3V 66 17 BMD31 GND 18 67 3 3V BMD56 68 19 GND BMD32 20 69 BMD57 GND 70 21 BMD33 GND 22 71 GND BMD58 72 23 GND BMD34 24 73 BMD59 3 3V 74 25 BMD35 GND 26 75 3 3V BMD60 76 27 GND BMD3...

Page 130: ... 3 3V 24 25 GND CBE3 26 25 IDSEL AD23 26 27 AD22 AD21 28 27 3 3V AD20 28 29 AD19 5V 30 29 AD18 GND 30 31 5V AD17 32 31 AD16 CBE2 32 33 FRAME GND 34 33 GND Not Used 34 35 GND IRDY 36 35 TDRY 3 3V 36 37 DEVSEL 5V 38 37 GND STOP 38 39 GND LOCK 40 39 PERR GND 40 41 SDONE SBO 42 41 3 3V SERR 42 43 PAR GND 44 43 CBE1 GND 44 45 5V AD15 46 45 AD14 AD13 46 47 AD12 AD11 48 47 GND AD10 48 49 AD09 5V 50 49 AD...

Page 131: ...FAIL 10 11 GND VBGOUT3 VBERR 11 12 VDS1 VBR0 VSYSRESET 12 13 VDS0 VBR1 VLWORD 13 14 VWRITE VBR2 VAM5 14 15 GND VBR3 VA23 15 16 VDTACK VAM0 VA22 16 17 GND VAM1 VA21 17 18 VAS VAM2 VA20 18 19 GND VAM3 VA19 19 20 VIACK GND VA18 20 21 VIACKIN VSERCLK VA17 21 22 VIACKOUT VSERDAT VA16 22 23 VAM4 GND VA15 23 24 VA7 VIRQ7 VA14 24 25 VA6 VIRQ6 VA13 25 26 VA5 VIRQ5 VA12 26 27 VA4 VIRQ4 VA11 27 28 VA3 VIRQ3 ...

Page 132: ...rd RJ45 socket For MVME1600 001 base boards the RJ45 connector is located on the MVME760 transition module for MVME1600 011 base boards it is located on the front panel of the board itself The pin assignments are listed in the following table Table 4 8 Ethernet 10BaseT Connector 1 ENTD 2 ENTD 3 ENRD 4 No Connection 5 No Connection 6 ENRD 7 No Connection 8 No Connection ...

Page 133: ... separate module The pin assignments are listed in the following table Table 4 9 Disk Drive Mezzanine Connector 1 GND F_DENSEL 2 3 GND No Connection 4 5 GND F_MSEN0 6 7 No Connection F_INDEX 8 9 GND F_MTR0 10 11 GND F_DR1 12 13 No Connection F_DR0 14 15 GND F_MTR1 16 17 F_MSEN1 F_DIR 18 19 GND F_STEP 20 21 GND F_WDATA 22 23 GND F_WGATE 24 25 GND F_TRK0 26 27 GND F_WP 28 29 GND F_RDATA 30 31 GND F_...

Page 134: ...ME signals for 24 bit addressing and 16 bit data Its pin assignments are set by the VMEbus specification P2 rows A and C provide power and interface signals to the MVME760 transition module P2 row C supplies the base board with power with the upper eight VMEbus address lines and with an additional 16 VMEbus data lines The pin assignments for P2 are listed in the following table SCSI Connector The ...

Page 135: ...SCSID4 44 11 GND SCSID5 45 12 GND SCSID6 46 13 GND SCSID7 47 14 GND SCSCDP0 48 15 GND GND 49 16 GND GND 50 17 SCSI_TP SCSI_TP 51 18 SCSI_TP SCSI_TP 52 19 No Connection No Connection 53 20 GND GND 54 21 GND SATN 55 22 GND GND 56 23 GND SBSY 57 24 GND SACK 58 25 GND SRST 59 26 GND SMSG 60 27 GND SSEL 61 28 GND SC_D 62 29 GND SREQ 63 30 GND SI_O 64 31 GND SCSID8 65 32 GND SCSID9 66 33 GND SCSID10 67 ...

Page 136: ...B15 graphics connector located on the front panel The pin assignments for the graphics connector are listed in the following table Table 4 11 Graphics Connector 1 GIRED 2 GIGREEN 3 GIBLUE 4 GIP2 5 GND 6 GND 7 GND 8 GND 9 No Connection 10 GND 11 GIP0 12 GIP1 13 GIHSYNC 14 GIVSYNC 15 GIP3 ...

Page 137: ...ectors for the keyboard and mouse located on the front panel The pin assignments for those connectors are listed in the following two tables Table 4 12 Keyboard Connector 1 K_DATA 2 No Connection 3 GND 4 5VKBM 5 K_CLK 6 No Connection Table 4 13 Mouse Connector 1 M_DATA 2 No Connection 3 GND 4 5VKBM 5 M_CLK 6 No Connection ...

Page 138: ...the MVME1600 001 base board the AUI interface is implemented with a DB15 J11 connector located on the MVME760 transition module The pin assignments are listed in the following table Table 4 14 Ethernet AUI Connector MVME760 1 GND 2 C 3 T 4 GND 5 R 6 GND 7 No Connection 8 GND 9 C 10 T 11 GND 12 R 13 12V 14 GND 15 No Connection ...

Page 139: ... J10 located on the MVME760 transition module The pin assignments are listed in the following table Table 4 15 Parallel I O Connector MVME760 1 PRBSY GND 19 2 PRSEL GND 20 3 PRACK GND 21 4 PRFAULT GND 22 5 PRPE GND 23 6 PRD0 GND 24 7 PRD1 GND 25 8 PRD2 GND 26 9 PRD3 GND 27 10 PRD4 GND 28 11 PRD5 GND 29 12 PRD6 GND 30 13 PRD7 GND 31 14 INPRIME GND 32 15 PRSTB GND 33 16 SELIN GND 34 17 AUTOFD GND 35...

Page 140: ... serial connections For the MVME1600 001 base board the asynchronous interface is implemented with a pair of DB9 connectors COM1 and COM2 located on the MVME760 transition module The pin assignments are listed in the following table Table 4 16 Serial Connections Ports 1 and 2 MVME760 1 SPnDCD 2 SPnRD 3 SPnTD 4 SPnDTR 5 GND 6 SPnDSR 7 SPnRTS 8 SPnCTS 9 SPnRI ...

Page 141: ... an HD26 front panel connector J5 The pin assignments for serial ports 3 and 4 are listed in the following table Table 4 17 Serial Connections Ports 3 and 4 MVME760 Panel Connector Ribbon Connector 1 No Connection 1 2 TXDn 3 3 RXDn 5 4 RTSn 7 5 CTSn 9 6 DSRn 11 7 GND 13 8 DCDn 15 9 SPn_P9 17 10 SPn_P10 19 11 SPn_P11 21 12 SPn_P12 23 13 SPn_P13 25 14 SPn_P14 2 15 TXCIn 4 16 SPn_P16 6 17 RXCIn 8 18 ...

Page 142: ... for 24 bit addressing and 16 bit data Its pin assignments are set by the VMEbus specification P2 rows A and C provide power and interface signals to the MVME712M transition module P2 row C supplies the base board with power with the upper eight VMEbus address lines and with an additional 16 VMEbus data lines The pin assignments for P2 are listed in the following table SCSI Connector The SCSI conn...

Page 143: ...10 11 SBSY VA31 PR_DATA2 11 12 SACK GND PR_DATA3 12 13 SRST 5V PR_DATA4 13 14 SMSG VD16 PR_DATA5 14 15 SSEL VD17 PR_DATA6 15 16 SC_D VD18 PR_DATA7 16 17 SREQ VD19 PR_ACK 17 18 SI_O VD20 PR_BSY 18 19 TXD3 VD21 PR_PE 19 20 RXD3 VD22 PR_SLCT 20 21 RTS3 VD23 PR_INIT 21 22 CTS3 GND PR_ERR 22 23 DTR3 VD24 TXD1 23 24 DCD3 VD25 RXD1 24 25 TXD4 VD26 RTS1 25 26 RXD4 VD27 CTS1 26 27 RTS4 VD28 TXD2 27 28 TRXC...

Page 144: ...ND DB03 29 5 GND DB04 30 6 GND DB05 31 7 GND DB06 32 8 GND DB07 33 9 GND DBP 34 10 GND GND 35 11 GND GND 36 12 GND GND 37 13 Reserved TERMPWR 38 14 GND GND 39 15 GND GND 40 16 GND ATN 41 17 GND GND 42 18 GND BSY 43 19 GND ACK 44 20 GND RST 45 21 GND MSG 46 22 GND SEL 47 23 GND D C 48 24 GND REQ 49 25 GND O I 50 ...

Page 145: ...oard the AUI interface is implemented with a DB15 connector located on the MVME712M transition module The pin assignments are listed in the following table Table 4 20 Ethernet AUI Connector MVME712M 1 No Connection 2 C 3 T 4 No Connection 5 R 6 GND 7 No Connection 8 No Connection 9 C 10 T 11 No Connection 12 R 13 12V 14 No Connection 15 No Connection ...

Page 146: ...transition module The pin assignments are listed in the following table Table 4 21 Parallel I O Connector MVME712M 1 PRSTB GND 19 2 PRD0 GND 20 3 PRD1 GND 21 4 PRD2 GND 22 5 PRD3 GND 23 6 PRD4 GND 24 7 PRD5 GND 25 8 PRD6 GND 26 9 PRD7 GND 27 10 PRACK GND 28 11 PRBSY GND 29 12 PRPE GND 30 13 PRSEL INPRIME 31 14 No Connection PRFAULT 32 15 No Connection No Connection 33 16 GND No Connection 34 17 No...

Page 147: ...el connectors J2 J3 on the base board The pin assignments for serial ports 1 4 on the MVME712M are listed in the following table Table 4 22 Serial Connections MVME712M Ports 1 4 1 No Connection 2 ETXDn 3 ERXDn 4 ERTSn 5 ECTSn 6 EDSRn 7 GND 8 EDCDn 9 No Connection 10 No Connection 11 No Connection 12 No Connection 13 No Connection 14 No Connection 15 ERTXC Port 4 only 16 No Connection 17 ERRXC Port...

Page 148: ...604 SBC or the support information sections of the MVME760 or MVME712M transition module documentation as necessary Table 4 23 Serial Connections MVME1600 011 Ports 3 and 4 1 No Connection 2 TXDn 3 RXDn 4 RTSn 5 CTSn 6 SPnDSR 7 GND 8 DCDn 9 No Connection 10 No Connection 11 No Connection 12 No Connection 13 No Connection 14 No Connection 15 SPnTXC 16 No Connection 17 SPnRXC 18 SPnLL 19 No Connecti...

Page 149: ...odification of memory breakpoint and tracing capabilities a powerful assembler and disassembler useful for patching programs and a self test at power up feature which verifies the integrity of the system Various PPCBug routines that handle I O data conversion and string functions are available to user programs through the System Call handler PPCBug consists of three parts A command driven user int...

Page 150: ...r disassembler and the passing of arguments to the system calls Memory Requirements PPCBug requires a total of 512KB of read write memory i e DRAM The debugger allocates this space from the top of memory For example a system containing 64MB 04000000 of read write memory will place the PPCBug memory page at locations 03F80000 to 03FFFFFF PPCBug Implementation PPCBug is written largely in the C prog...

Page 151: ...or example GO then control may or may not return to the debugger depending on what the user program does For example if a breakpoint has been specified then control returns to the debugger when the breakpoint is encountered during execution of the user program Alternately the user program could return to the debugger by means of the System Call Handler routine RETURN described in the PPCBug Firmwa...

Page 152: ...able 5 1 Debugger Commands Command Description AS One Line Assembler BC Block of Memory Compare BF Block of Memory Fill BI Block of Memory Initialize BM Block of Memory Move BR Breakpoint Insert NOBR Breakpoint Delete BS Block of Memory Search BV Block of Memory Verify CM Concurrent Mode NOCM No Concurrent Mode CNFG Configure Board Information Block CS Checksum DC Data Conversion DMA Block of Memo...

Page 153: ...for Configuring Disk Controller LO Load S Records from Host MA Macro Define Display NOMA Macro Delete MAE Macro Edit MAL Enable Macro Listing NOMAL Disable Macro Listing MAR Load Macros MAW Save Macros MD MDS Memory Display MENU System Menu MM Memory Modify MMD Memory Map Diagnostic MS Memory Set MW Memory Write NAB Automatic Network Boot NBH Network Boot Operating System Halt NBO Network Boot Ope...

Page 154: ...gister Display REMOTE Remote RESET Cold Warm Reset RL Read Loop RM Register Modify RS Register Set SD Switch Directories SET Set Time and Date SYM Symbol Table Attach NOSYM Symbol Table Detach SYMS Symbol Table Display Search T Trace TA Terminal Attach TIME Display Time and Date TM Transparent Mode TT Trace to Temporary Breakpoint VE Verify S Records Against Memory VER Revision Version Display WL ...

Page 155: ...roups Test Set Description Applicability DEC21040 DECchip 21040 Ethernet Controller Tests All MVME1603 1604 I82378 i82378 PCI ISA Bridge Tests All MVME1603 1604 KBD87303 PC87303 Keyboard Mouse Tests Not applicable to versions with 011 base board L2CACHE Level 2 Cache Tests MVME1603 1604 with L2 cache only NCR NCR 53C825 53C810 SCSI 2 I O Processor Tests All MVME1603 1604 PAR87303 PC87303 87323 Par...

Page 156: ...Using the Debugger 5 8 5 ...

Page 157: ...the hardware Use the PPCBug command CNFG to change those parameters Use the PPCBug command ENV to change configurable PPCBug parameters in NVRAM The CNFG and ENV commands are both described in the PPCBug Firmware Package User s Manual part number PPCBUGA1 UM Refer to that manual for general information about their use and capabilities The following paragraphs present additional information aboutCN...

Page 158: ...ted are considered data strings and data strings are right justified The data strings are padded with zeroes if the length is not met The Board Information Block is factory configured before shipment There is no need to modify block parameters unless the NVRAM is corrupted Refer to the Programmer s Reference Guide part number V1600 1A PG for the actual location and other information about the Boar...

Page 159: ...bed below are the parameters that you can configure using ENV The default values shown were those in effect when this publication went to print Configuring the PPCBug Parameters The parameters that can be configured using ENV are Bug or System environment B S S Field Service Menu Enable Y N Y B Bug is the mode where no system type of support is displayed However system related items are still avai...

Page 160: ...ass and start execution of the cross loaded program B Use both the GCSR and the MPCR methods to pass and start execution of the cross loaded program Default N Do not use any Remote Start Method Y Accesses will be made to the appropriate system buses e g VMEbus local MPU bus to determine the presence of supported controllers Default N Accesses will not be made to the VMEbus to determine the presenc...

Page 161: ...e the VMEbus SYSFAIL signal after successful completion or entrance into the bug command monitor Default Y Local SCSI bus is reset on debugger setup Default N Local SCSI bus is not reset on debugger setup A Asynchronous SCSI bus negotiation Default S Synchronous SCSI bus negotiation N None W Wide SCSI 16 bit bus N Narrow SCSI 8 bit bus Default Y Give boot priority to devices defined in the fw boot...

Page 162: ... Device Type List FDISK CDROM TAPE HDISK The listing of boot devices displayed if the Autoboot Scan option is enabled If you modify the list follow the format shown above uppercase letters using forward slash as separator Y The Autoboot function is enabled Default N The Autoboot function is disabled Y Autoboot is attempted at power up reset only N Autoboot is attempted at any reset Default Y If Au...

Page 163: ...ition that will be booted Other acceptable values are 1 2 3 or 4 In these four cases the partition specified will be booted without searching Auto Boot Abort Delay 7 The time in seconds that the Autoboot sequence will delay before starting the boot The purpose for the delay is to allow you the option of stopping the boot by use of the BREAK key The time value is from 0 255 seconds Default 7 second...

Page 164: ...PCBug searches for a ROMboot module Default FFF00000 ROM Boot Direct Ending Address FFFFFFFC The last location tested when PPCBug searches for a ROMboot module Default FFFFFFFC Network Auto Boot Enable Y N Y Network Auto Boot at power up only Y N N Y VMEbus address space in addition to the usual areas of memory will be searched for a ROMboot module N VMEbus address space will not be accessed by RO...

Page 165: ...AM 00001000 The address where the network interface configuration parameters are to be saved retained in NVRAM these parameters are the necessary parameters to perform an unattended network boot A typical offset might be 1000 but this value is application specific Default 00001000 Caution If you use the NIOT debugger command these parameters need to be saved somewhere in the offset range 00000000 ...

Page 166: ...d The default is set to the slowest speed found on the available banks of DRAM memory ROM First Access Length 0 31 10 This is the value programmed into the MPC105 ROMFAL field Memory Control Configuration Register 8 bits 23 27 to indicate the number of clock cycles used in accessing the ROM The lowest allowable ROMFAL setting is 00 the highest allowable is 1F The value to enter depends on processo...

Page 167: ...ection Always Never O A N O PCI Interrupts Route Control Registers PIRQ0 1 2 3 0A0B0E0F Initializes the PIRQx PCI Interrupts route control registers in the IBC PCI ISA bus bridge controller The ENV parameter is a 32 bit value that is divided by 4 to yield the values for route control registers PIRQ0 1 2 3 The default is determined by system type For details on PCI ISA interrupt assignments and for...

Page 168: ...r the VME2PCI s slave interface PCI memory accesses within the range of this starting address and its associated ending address are passed on to the VMEchip2 after modification by the address offset value Only the upper 16 bits of this address are significant Default 01000000 VME2PCI Slave Ending Address 1 1FFFFFFF Controls the ending address of the first PCI Memory Space for the VME2PCI s slave i...

Page 169: ...16 bits of this address are significant Default 20000000 VME2PCI Slave Ending Address 2 2FFFFFFF Controls the ending address of the second PCI Memory Space for the VME2PCI s slave interface Only the upper 16 bits of this address are significant Default 2FFFFFFF VME2PCI Slave Address Offset 2 D0000000 Used in translating the most significant 16 bits of the address to be presented to the VMEchip2 fr...

Page 170: ...ed with the starting and ending address selection from the previous questions Default 80000000 Slave Address Translation Select 1 FE000000 Defines which bits of the address are significant A logical 1 indicates significant address bits and a logical 0 is nonsignificant Default FE000000 Slave Control 1 03FF Defines the access restriction for the address space defined with this slave address decoder...

Page 171: ...s of the local resource associated with the starting and ending address selection from the previous questions Default 00000000 Slave Address Translation Select 2 00000000 Defines which bits of the address are significant A logical 1 indicates significant address bits and a logical 0 is nonsignificant Default 00000000 Slave Control 2 0000 Defines the access restriction for the address space defined...

Page 172: ...r Enable 2 Y N N Master Starting Address 2 00000000 Base address of the VMEbus resource that is accessible from the local bus Default 00000000 Master Ending Address 2 00000000 Ending address of the VMEbus resource that is accessible from the local bus Default 00000000 Master Control 2 00 Defines the access characteristics for the address space defined with this master address decoder Default 00 Ma...

Page 173: ...0 Defines the access characteristics for the address space defined with this master address decoder Default 00 Master Enable 4 Y N N Master Starting Address 4 00000000 Base address of the VMEbus resource that is accessible from the local bus Default 00000000 Master Ending Address 4 00000000 Ending address of the VMEbus resource that is accessible from the local bus Default 00000000 Y Yes set up an...

Page 174: ...istics for the address space defined with this master address decoder Default 00 Short I O VMEbus A16 Enable Y N Y Short I O VMEbus A16 Control 01 Defines the access characteristics for the address space defined with the Short I O address decoder Default 01 F Page VMEbus A24 Enable Y N Y F Page VMEbus A24 Control 02 Defines the access characteristics for the address space defined with the F Page a...

Page 175: ...I O for this board Default 00 VMEC2 GCSR Board Base Address 00 Specifies the base address FFFF00x0 in Short I O for this board Default 00 VMEbus Global Time Out Code 02 Controls the VMEbus time out interval when the MVME1603 1604 is system controller Default 02 256 microseconds VMEbus Access Time Out Code 02 This controls the local bus to VMEbus access time out interval Default 02 32 milliseconds ...

Page 176: ...ENV Set Environment 6 20 6 ...

Page 177: ...ing Product Literature USA and Canada only Contacting the Literature Center via phone or fax at the numbers listed under Product Literature at MCG s World Wide Web site above Any supplements issued for a specific revision of a manual or guide are furnished with that document The type and revision level of a specific manual are indicated by the last three characters of the document number such as I...

Page 178: ...V1600 1A IH MVME1603 MVME1604 Single Board Computer Programmer s Reference Guide V1600 1A PG PM603 PM604 Processor Memory Mezzanine Module and RAM104 DRAM Memory Module User s Manual PM603A UM PPCBug Firmware Package User s Manual Parts 1 and 2 PPCBUGA1 UM PPCBUGA2 UM PPC1Bug Diagnostics Manual PPC1DIAA UM MVME712M Transition Module and P2 Adapter Board User s Manual MVME712M D MVME760 Transition ...

Page 179: ... ordered as part number 68 PCIKIT Table A 2 Manufacturers Documents Document Title and Source Publication Number PowerPC 603TM RISC Microprocessor Technical Summary Motorola Literature and Printing Distribution Services P O Box 20924 Phoenix Arizona 85036 0924 Telephone 602 994 6561 FAX 602 994 6430 MPC603 D PowerPC 603TM RISC Microprocessor User s Manual Motorola Literature and Printing Distribut...

Page 180: ...er User s Manual Motorola Literature and Printing Distribution Services P O Box 20924 Phoenix Arizona 85036 0924 Telephone 602 994 6561 FAX 602 994 6430 MPC105UM AD PowerPCTM Microprocessor Family The Programming Environments Motorola Literature and Printing Distribution Services P O Box 20924 Phoenix Arizona 85036 0924 Telephone 602 994 6561 FAX 602 994 6430 OR IBM Microelectronics Mail Stop A25 ...

Page 181: ...uper I OTM Sidewinder Lite Floppy Disk Controller Keyboard Controller Real Time Clock Dual UARTs IEEE 1284 Parallel Port and IDE Interface National Semiconductor Corporation Customer Support Center or nearest Sales Office 2900 Semiconductor Drive P O Box 58090 Santa Clara California 95052 8090 Telephone 1 800 272 9959 PC87303VUL PC87323VF Super I OTM Sidewinder Floppy Disk Controller Keyboard Cont...

Page 182: ...ler Intel Corporation Literature Sales P O Box 7641 Mt Prospect Illinois 60056 7641 Telephone 1 800 548 4725 290473 003 SYM 53CXX was NCR 53C8XX Family PCI SCSI I O Processors Programming Guide Symbios Logic Inc 1731 Technology Drive suite 600 San Jose CA95110 Telephone 408 441 1080 Hotline 1 800 334 5454 J10931I SCC Serial Communications Controller User s Manual for Z85230 and other Zilog parts Z...

Page 183: ...7 Telephone 1 800 888 5016 Telephone 512 445 7222 FAX 512 445 7581 DS111PP4 CSB4231 4248 Evaluation Board Data Sheet Crystal Semiconductor Corporation 4210 South Industrial Drive P O Box 17847 Austin Texas 78744 7847 Telephone 1 800 888 5016 Telephone 512 445 7222 FAX 512 445 7581 DS111DB4 Award Classic KB42 Keyboard Controller Firmware for the National Semiconductor PC87323VUL IAB SuperI OTM Devi...

Page 184: ... Englewood CO 80112 5704 Telephone 1 800 854 7179 Telephone 303 792 2181 X3 131 1990 ANSI Std X3T9 2 1994 AT Attachment Interface for Disk Drives Global Engineering Documents 15 Inverness Way East Englewood CO 80112 5704 Telephone 1 800 854 7179 Telephone 303 792 2181 ANSI X3 221 Bidirectional Parallel Port Interface Specification Institute of Electrical and Electronics Engineers Inc Publication a...

Page 185: ...4333 IEEE 802 3 Information Technology Local and Metropolitan Networks Part 3 Carrier Sense Multiple Access with Collision Detection CSMA CD Access Method and Physical Layer Specifications Global Engineering Documents 15 Inverness Way East Englewood CO 80112 5704 Telephone 1 800 854 7179 Telephone 303 792 2181 This document can also be obtained through the national standards body of member countri...

Page 186: ...PowerPC Telephone 1 800 769 3772 Telephone 708 296 9332 MPR PPC RPU 02 VME64 Specification VITA VMEbus International Trade Association 7825 E Gelding Drive Suite 104 Scottsdale Arizona 85260 3415 Telephone 602 951 8866 FAX 602 951 0720 NOTE An earlier version of this specification is available as Versatile Backplane Bus VMEbus Institute of Electrical and Electronics Engineers Inc Publication and S...

Page 187: ...ecifications Characteristics Specifications Power requirements Excluding Processor Memory mezzanine transition module keyboard mouse 5Vdc 5 2A typical 3A maximum 12Vdc 5 100mA maximum 12Vdc 5 100mA maximum in MVME1600 011 no 12Vdc in MVME1600 001 Operating temperature 0 C to 55 C entry air with forced air cooling refer to Cooling Requirements section Storage temperature 40 C to 85 C Relative humid...

Page 188: ...embly and the card cage where the incoming airstream first encounters the module under test Test software is executed as the module is subjected to ambient temperature variations Case temperatures of critical high power density integrated circuits are monitored to ensure component vendors specifications are not exceeded While the exact amount of airflow required for cooling depends on the ambient ...

Page 189: ...l external I O ports Cable shields connected to earth ground via metal shell connectors bonded to a conductive module front panel Conductive chassis rails connected to earth ground This provides the path for connecting shields to earth ground Front panel screws properly tightened For minimum RF emissions it is essential that the conditions above be implemented Failure to do so could compromise the...

Page 190: ...EMC Compliance B 4 B ...

Page 191: ... National Semiconductor to implement the two asynchronous serial ports in addition to the disk drive controller parallel I O and keyboard mouse interface Table C 1 MVME1600 001 MVME1600 011 Serial Ports Base Board Serial Interface MVME1600 001 2 asynchronous ports EIA 232 D DTE via P2 and MVME760 transition module 2 synchronous asynchronous ports EIA 232 D or EIA 530 DCE DTE via P2 and MVME760 tra...

Page 192: ...ck to implement the two synchronous asynchronous serial communications ports which for the MVME1600 001 base board are routed through P2 and for the MVME1600 011 base board are routed through the front panel as well as P2 The Z85230 handles both synchronous SDLC HDLC and asynchronous protocols The hardware supports asynchronous serial baud rates of 110B s to 38 4KB s and synchronous baud rates of ...

Page 193: ...quipment DCE Since computers are normally configured to work with terminals they are said to be configured as a modem in most cases Table C 2 EIA 232 D Interconnect Signals Pin Number Signal Mnemonic Signal Name and Description 1 Not used 2 TxD Transmit Data Data to be transmitted input to modem from terminal 3 RxD Receive Data Data which is demodulated from the receive line output from modem to t...

Page 194: ...xC Transmit Clock DCE Output from modem to terminal clocks data from the terminal to the modem 16 Not used 17 RxC Receive Clock Output from terminal to modem clocks input data from the terminal to the modem 18 19 Not used 20 DTR Data Terminal Ready Input to modem from terminal indicates that the terminal is ready to send or receive data 21 Not used 22 RI Ring Indicator Output from modem to termina...

Page 195: ... binary data both synchronous and Table C 3 EIA 232 D Interface Transmitter Characteristics Parameter Value Unit Minimum Maximum Output voltage with load resistance of 3000Ω to 7000Ω 8 5 V Open circuit output voltage 12 V Short circuit output current to ground or any other interconnection cable conductor 100 mA Power off output resistance 300 W Output transition time for a transition region of 3V ...

Page 196: ...e 7 SG Signal Ground Common return line for all signals 8 DCD_A Data Carrier Detect A Receive line signal detector output from DCE to DTE to indicate that valid data is being transferred to the DTE on the RxD line 9 RxC_B Receive Signal Element Timing DCE B Control signal that clocks input data 10 DCD_B Data Carrier Detect B Receive line signal detector output from DCE to DTE to indicate that vali...

Page 197: ...cate that the DCE is ready to send or receive data In DCE configuration always true 23 DTR_B Data Terminal Ready B Output from DTE to DCE indicating that the DTE is ready to send or receive data 24 TxCO_A Transmit Signal Element Timing DTE A Control signal that clocks output data 25 TM_A Test Mode A Indicates whether the local DCE is under test In DTE configuration ignored In DCE configuration alw...

Page 198: ...gnal conductor and circuit ground at the load end of the cable with a 50Ω resistor substituted for the transmitter It is necessary to minimize interference with other signals Inversion of signals may be required e g plus polarity MARK to minus polarity MARK may be achieved by inverting the cable pair EIA 530 interface transmitter and receiver parameters applicable to the MVME1603 MVME1604 are list...

Page 199: ... several amperes of current could result This condition may not only be dangerous for the small wires in a typical cable but may also produce electrical noise that causes errors in data transmission That is why Table C 2 and Table C 5 show no connection for pin 1 Normally pin 7 signal ground should only be connected to the chassis ground at one point if several terminals are used with one computer...

Page 200: ...Proper Grounding C 10 C ...

Page 201: ... If the FUS or RUN PWR 12V or CPU LED as appli cable is not lit the board may not be getting correct power 1 Make sure the system is plugged in 2 Check that the board is securely installed in its backplane or chassis 3 Check that all necessary cables are connected to the board per this manual 4 Check for compliance with System Considerations per this manual 5 Review the Installation and Startup pr...

Page 202: ...d incorrectly Check the board jumpers per this manual C You may have invoked flow control by pressing a HOLD or PAUSE key or by typing CTRL S Press the HOLD or PAUSE key again If this does not free up the keyboard type in CTRL Q YOU ARE FINISHED DONE WITH THIS TROUBLESHOOTING PROCEDURE PROCEED WITH THE TROUBLESHOOTING PROCEDURE FOR YOUR PARTICULAR CPU BOARD AS GIVEN IN THE FOLLOWING TABLE Table D ...

Page 203: ...set IV Debug prompt PPC1 Bug appears at powerup but the board does not autoboot A The initial debugger environment parameters may be set incorrectly 1 Start the onboard calendar clock and timer Type set mmddyyhhmm CR where the characters indicate the month day year hour and minute The date and time will be displayed Performing the next step will change some parameters that may affect your system o...

Page 204: ... to step VI If there are no errors go to step V V The debugger is in system mode and the board autoboots or the board has passed selftests A No problems troubleshooting is done No further troubleshooting steps are required Note Even if the board passes all tests it may still be bad The selftest does not try out all functions in the board for example SCSI or VMEbus tests VI The board has failed one...

Page 205: ...re 8 bit 16 bit or 32 bit architectural design systems ASCII American Standard Code for Information Interchange a 7 bit code used to encode alphanumeric information In the IBM compatible world this is expanded to 8 bits to encode a total of 256 alphanumeric and control characters ASIC Application Specific Integrated Circuit AUI Attachment Unit Interface BBRAM Battery Backed up Random Access Memory...

Page 206: ... between the CPU memory and various input output devices including floppy drives and hard disk drives Available in various widths 8 16 and 32 bit with accompanying increases in speed cache A high speed memory that resides logically between a central processing unit CPU and the main memory This temporary memory holds the data and or instructions that the CPU is most likely to use over and over agai...

Page 207: ...rect Memory Access A method by which a device may read or write to memory directly without processor intervention DMA is typically used by block I O devices DOS Disk Operating System dpi dots per inch DRAM Dynamic Random Access Memory A memory technology that is characterized by extremely high density low power and low cost It must be more or less continuously refreshed to avoid loss of data DTE D...

Page 208: ...s up to 100 Mbps FIFO First In First Out A memory that can temporarily hold data so that the sending device can send data faster than the receiving device can accept it The sending and receiving devices typically operate asynchronously firmware The program or specific software instructions that have been more or less permanently burned into an electronic component such as a ROM read only memory or...

Page 209: ...eo bandwidth is roughly half that required for a non interlaced system of the same resolution This results in less costly hardware and may also make it possible to display a resolution that would otherwise be impossible on given hardware The disadvantage of an interlaced system is flicker especially when displaying objects that are only a few scanlines high IQ Signals Similar to the color differen...

Page 210: ...cache the DRAM system memory array and the PCI bus MPC601 Motorola s component designation for the PowerPC 601 microprocessor MPC603 Motorola s component designation for the PowerPC 603 microprocessor MPC603e Motorola s component designation for the PowerPC 603e microprocessor MPC604 Motorola s component designation for the PowerPC 604 microprocessor MPU MicroProcessing Unit MTBF Mean Time Between...

Page 211: ... files and dispatches programs OTP One Time Programmable palette The range of colors available on the screen not necessarily simultaneously For VGA this is either 16 or 256 simultaneous colors out of 262 144 parallel port A connector that can exchange data with an I O device eight bits at a time This port is more commonly used for the connection of a printer to a system PCI local bus Peripheral Co...

Page 212: ...la Inc under license from IBM PowerPC 601 The first implementation of the PowerPC family of microprocessors This CPU incorporates a memory management unit with a 256 entry buffer and a 32KB unified instruction and data cache It provides a 64 bit data bus and a separate 32 bit address bus PowerPC 601 is used by Motorola Inc under license from IBM PowerPC 603 The second implementation of the PowerPC...

Page 213: ...ory The temporary memory that a computer uses to hold the instructions and data currently being worked with All data in RAM is lost when the computer is turned off RAS Row Address Strobe A clock signal used in dynamic RAMs to control the input of the row addresses Reduced Instruction Set Computer RISC A computer in which the processor s instruction set is limited to constant length instructions th...

Page 214: ...ler SMP Symmetric MultiProcessing A computer architecture in which tasks are distributed among two or more local processors SMT Surface Mount Technology A method of mounting devices such as integrated circuits resistors capacitors and others on a printed circuit board characterized by not requiring mounting holes Rather the devices are soldered to pads on the printed circuit board Surface mount de...

Page 215: ... RG58A U coaxial cable capable of carrying data at 10 Mbps for a length of 185 meters also referred to as AUI or thinnet twisted pair Ethernet 10BaseT An Ethernet implementation in which the physical medium is an unshielded pair of entwined wires capable of carrying data at 10 Mbps for a maximum distance of 185 meters UART Universal Asynchronous Receiver Transmitter UV UltraViolet UVGA Ultra Video...

Page 216: ...wer supply is disconnected VRAM Video Dynamic Random Access Memory Memory chips with two ports one used for random accesses and the other capable of serial accesses Once the serial port has been initialized with a transfer cycle it can operate independently of the random port This frees the random port for CPU accesses The result of adding the serial port is a significantly reduced amount of inter...

Page 217: ... chassis rails B 3 configure PPC1Bug parameters 6 3 VMEbus interface 6 12 Configure Board Information Block 6 2 connector pin assignments 4 1 console port selection 1 8 1 24 control status registers 1 46 cooling requirements B 2 counters 3 14 D data circuit terminating equipment DCE C 3 data terminal equipment DTE C 3 DCE 3 16 debugger commands 5 4 firmware PPCBug 5 1 6 1 decimal number 4 diagnost...

Page 218: ...ntrols 2 1 3 21 functional description 3 25 fuses 3 16 3 22 3 23 MVME1600 001 base board 1 46 MVME1600 011 base board 1 47 G general purpose readable jumpers MVME1600 001 base board 1 8 1 23 global bus timeout 1 45 graphics GD5434 2 28 graphics interface 3 8 ground connections C 9 H hexadecimal character 4 I IBC arbiter configuration diagram 2 19 DMA channel assignments 2 24 interrupt handler bloc...

Page 219: ... Volatile RAM NVRAM 6 1 6 3 normal address range 2 4 O operating parameters 6 1 P P2 adapter board 3 7 3 28 multiplexing function 3 16 3 18 parallel port 3 10 PCI arbitration assignments 2 19 bus 3 4 3 9 pin assignments connector 4 1 power distribution 3 22 PPCBug debugger firmware 5 1 6 1 R real time clock 3 13 related specifications A 7 remote control status connector 3 14 MVME1600 011 base boar...

Page 220: ...reset 2 24 speaker output 1 47 3 14 3 24 specifications base board B 1 SYSFAIL 6 5 system controller 1 38 reset SRST 3 19 T time out 6 19 timers 3 14 transition modules 1 2 1 47 3 23 3 27 installation 1 38 transmitters EIA 232 D C 5 EIA 530 C 8 U uppercase 5 8 user definable jumpers 1 8 1 24 V VGA port 3 8 video port 1 9 VME2PCI 6 3 6 12 VMEbus address data configurations 1 45 interface 6 12 time ...

Page 221: ... MVME1603 MVME1604 Single Board Computer nstallation and Use MVME1603 MVME1604 ingle Board Computer Installation and Use ...

Page 222: ......

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