Motorola MCU M68MPB916R3 User Manual Download

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PIN 10 OF ALL 20-PIN ICS, ETC.

PIN 8 OF ALL 16-PIN ICS

PIN 7 OF ALL 14-PIN ICS

PIN 4 OF ALL 8-PIN ICS

UNLESS OTHERWISE SPECIFIED, GROUND IS APPLIED TO:

8. GROUND LOCATIONS

UNLESS OTHERWISE SPECIFIED, VCC IS APPLIED TO:

7. VCC LOCATIONS

PIN 8 OF ALL 8-PIN ICS

PIN 14 OF ALL 14-PIN ICS

PIN 16 OF ALL 16-PIN ICS

PIN 20 OF ALL 20-PIN ICS, ETC.

ALL VOLTAGES ARE DC.

ALL CAPACITORS ARE IN UF.

ALL RESISTORS ARE IN OHMS, 5%, 1/8 WATT.

IS AS FOLLOWS:

1. UNLESS OTHERWISE SPECIFIED:

2. INTERRUPTED LINES CODED WITH THE

3. DEVICE TYPE NUMBER IS FOR REFERENCE

4. SPECIAL SYMBOL USAGE:

5. INTERPRET DIAGRAM IN ACCORDANCE

6. CODE FOR SHEET TO SHEET REFERENCES

INPUT

OUTPUT

REVISION, WITH THE EXCEPTION OF

INSTITUTE SPECIFICATIONS, CURRENT

WITH AMERICAN NATIONAL STANDARDS

<> DENOTES - VECTORED SIGNALS.

* DENOTES - ACTIVE LOW SIGNAL.

ONLY. THE NUMBER VARIES WITH THE

LOGIC BLOCK SYMBOLOGY.

MANUFACTURER.

SHEET

ZONE

ARE ELECTRICALLY CONNECTED.

SAME LETTER OR LETTER COMBINATIONS

NOTES:

REV:

DWG. NO.

SIZE

GEDABV:

SHEET

DWG. NO.

REV:

GEDTTL:

MPB916R3C

2 OF 8

63ASE90957W

LAST_MODIFIED=Fri Mar 28 09:05:37 1997

BOARD

63ASE90957W

50V.

NOTES

Summary of Contents for MCU M68MPB916R3

Page 2: ...ich the failure of the Motorola product could create a situation where personal injury or death may occur Should Buyer purchase or use Motorola products for any such unintended or unauthorized application Buyer shall indemnify and hold Motorola and its officers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees ari...

Page 3: ...der W3 2 6 2 2 4 Voltage Reference Low Select Header W4 2 7 2 2 5 MCU Clock Source Select Header W5 2 8 2 2 6 Using a 32 KHz Clock 2 9 2 2 7 MCU ID Code Select Header W6 W7 2 10 2 2 8 VSSA Insertion Point E1 2 10 2 3 MEVB CONFIGURATION 2 11 2 4 ACTIVE PROBE CONFIGURATION 2 13 CHAPTER 3 MEVB QUICK START GUIDE 3 1 INTRODUCTION 3 1 3 2 CONFIGURING THE MPFB 3 1 3 2 1 MPFB Memory Devices 3 1 3 2 2 MPFB...

Page 4: ...PI Interface Connector P1 Pin Assignments 5 2 5 3 MAPI Interface Connector P2 Pin Assignments 5 3 5 4 MAPI Interface Connector P3 Pin Assignments 5 4 5 5 MAPI Interface Connector P4 Pin Assignments 5 5 TABLES 1 1 MPB Specifications 1 2 2 1 Jumper Header Types 2 3 2 2 MPB Jumper Header Descriptions 2 3 3 1 MPFB Quick Start Jumper Header Configuration 3 2 4 1 Logic Analyzer Connector J7 Pin Assignme...

Page 5: ...ignments 4 8 4 9 Logic Analyzer Connector J15 Pin Assignments 4 9 4 10 Logic Analyzer Connector J16 Pin Assignments 4 10 4 11 Logic Analyzer Connector J17 Pin Assignments 4 11 4 12 Logic Analyzer Connector J18 Pin Assignments 4 12 4 13 Logic Analyzer Connector J19 Pin Assignments 4 13 4 14 Logic Analyzer Connector J20 Pin Assignments 4 13 ...

Page 6: ...CONTENTS vi M68MPB16R3UM D ...

Page 7: ...e used in either the M68MMDS1632 Motorola Modular Development System MMDS or the M68MEVB1632 Modular Evaluation Board MEVB Alternately you may install the MPB directly in your target system if the target system includes a modular active probe interconnect MAPI interface The MCU device on the MPB defines which MCU is emulated evaluated by the MMDS or MEVB Both systems are invaluable tools for desig...

Page 8: ...ible Temperature Operating Storage 0 to 40 C 40 to 85 C Relative humidity 0 to 90 non condensing Power requirements 5Vdc 5 500 mA max Dimensions MCU Personality Board 3 25 x 3 25 in 82 6 x 82 6 mm 1 3 EQUIPMENT REQUIRED The external requirements for MPB operation are either an MEVB or MMDS system For MMDS operation requirements see the M68MMDS1632 Motorola Modular Development System User s Manual ...

Page 9: ...g 852 6106888 Tai Po 852 6668333 INDIA Bangalore 91 80 5598615 ISRAEL Herzlia 972 9 590222 ITALY Milan 39 2 82201 JAPAN Fukuoka 81 92 725 7583 Gotanda 81 3 5487 8311 Nagoya 81 52 232 3500 Osaka 81 6 305 1802 Sendai 81 22 268 4333 Takamatsu 81 878 37 9972 Tokyo 81 3 3440 3311 KOREA Pusan 82 51 4635 035 Seoul 82 2 554 5118 MALAYSIA Penang 60 4 2282514 MEXICO Mexico City 52 5 282 0230 Guadalajara 52 ...

Page 10: ...GENERAL INFORMATION 1 4 M68MPB16R3UM D ...

Page 11: ...nd is shipped with installed jumpers A jumper installed on a jumper header provides a connection between two points in the MPB circuit The MPB has two types of jumper headers three pin and two pin with a cut trace short A cut trace short has a copper trace between the feed through holes bottom or solder side of the MPB Table 2 1 describes each type of jumper header The MPB has five jumper headers ...

Page 12: ...trace short cut trace short Be careful not to cut adjacent PCB traces nor cut too deep into the multi layer circuit board If the cut trace short on a jumper header is already cut you can return the MPB to its default setting by installing a user supplied fabricated jumper Figure 2 1 M68MPB916R3 C version Parts Location Diagram top view ...

Page 13: ... Jumper between pins 1 and 2 factory default selects the MPB on board crystal clock source Jumper between pins 2 and 3 selects an external clock source as the MCU EXTAL input signal W2 1 2 Jumper installed or cut trace short intact factory default selects the on board VDDA power source No jumper or cut trace short lets you connect an external power source to W2 pin 2 and the external power source ...

Page 14: ...or external target system clock source The drawing below shows the factory configuration a fabricated jumper on pins 1 and 2 This configuration selects the MPB on board clock source crystal oscillator in the Y1 socket This crystal provides for operation at the maximum rate the MCU allows via the internal phase locked loop or direct clock input If you install the MPB in the active probe or directly...

Page 15: ...xternal power source to W2 pin 2 Removal of the cut trace short isolates the MCU VDDA pin from the other MPB circuitry Isolation lets you connect a precision VDDA source for accurate 10 bit analog digital A D generation When connecting an external VDDA power supply to the MPB connect the power supply ground to insertion point E1 For more information on A D generation refer to the Analog To Digital...

Page 16: ... fabricated jumper on W3 pins 2 and 3 Then connect the MCU VRH pin to the external VRH source Each configuration defines the best method for connecting the MCU VRH pin to the external VRH source MPB MPFB connect via the MPFB logic analyzer connector refer to Chapter 4 for the appropriate logic analyzer pin MPB MMDS1632 connect via the VRH pin of the target MCU socket MPB Target System connect via ...

Page 17: ...fabricated jumper on W4 pins 2 and 3 Then connect the MCU VRL pin to the external VRL source Each configuration defines the best method for connecting the MCU VRL pin to the external VRL source MPB MPFB connect via the MPFB logic analyzer connector refer to Chapter 4 for the appropriate logic analyzer pin MPB MMDS1632 connect via the VRL pin of the target MCU socket MPB Target System connect via t...

Page 18: ...ry configuration fabricated jumper on pins 1 and 2 This configuration selects the MCU internal phase lock loop frequency synthesizer as the clock To use the EXTAL input as the clock place the fabricated jumper on 2 and 3 W5 1 2 3 NOTE J14 pin 4 and W16 on the MPFB are marked MODCLK but this signal when using an M68HC916R3 is FASTREF The M68HC916R3 MEVB overlay is correct and marked FASTREF Use W16...

Page 19: ... is rated at 4 194 megahertz You may change Y1 to change the clock speed of the MPB The only other oscillator you may install is 32 kilohertz If you change Y1 to the slower value 32 KHz you must replace the following capacitors and resistor see diagram below C5 1 µf C57 1 µf R1 18 kΩ MC68HC916R3 L4 L5 W5 C8 R1 C5 C6 VDDI VSSI C57 58 62 60 ...

Page 20: ...n an MC68HC916R3 MCU is installed on the MPB To use the MPB with a different MCU installed configure the fabricated jumpers per the table below W6 W7 1 2 3 1 2 3 MCU W6 W7 MC68HC16R1 2 3 2 3 MC68HC916R1 1 2 2 3 MC68HC16R3 2 3 1 2 MC68HC916R3 1 2 1 2 2 2 8 VSSA Insertion Point E1 Insertion point E1 is a plate through hole that lets you connect an external ground to the MPB VSSA pin refer to paragra...

Page 21: ...help you get started using your MEVB CAUTION Turn OFF MPFB power when installing the MPB on the MPFB or removing the MPB from the MPFB Sudden power surges could damage MEVB integrated circuits To install the MPB on the MPFB refer to Figure 2 2 1 Inspect all connectors for bent or damaged pins 2 Align the MPB reference mark with the MPFB reference mark 3 Rotate the MPB until the four MAPI bus conne...

Page 22: ...MPFB Interconnection After you have installed the MPB install the plastic overlay on the MPFB place the overlay over logic analyzer connectors J12 through J20 and press down Holes in the overlay slide down over plastic clips on the MPFB These clips hold the overlay in place ...

Page 23: ...active probe and the station module 01 RE90340W01 REV 0 and 01 RE90341W01 REV 0 are printed on the active probe cables The active probe cables come with the MMDS For more information about the active probe cables refer to the M68MMDS1632 Motorola Modular Development System User s Manual MMDS1632UM D Active probe box the protective enclosure for the TCB CAUTION Turn off MMDS and target system power...

Page 24: ... end of the 01 RE90340W01 REV 0 active probe cable to connector P5 on the MMDS control board connect the other end to connector J5 on the TCB Secure the connector clamps on TCB connectors J5 and J6 The active probe is now ready to connect to the target system refer to the PPB configuration guide for information on connecting the active probe to the target system Figure 2 3 Active Probe Interconnec...

Page 25: ...ains the default jumper header settings for the MPB 3 2 CONFIGURING THE MPFB The MPFB includes jumper selectable options such as chip select usage memory type selection and memory size selection for the pseudo ROM sockets and reset data control NOTE The MPFB must be configured for the specific MPB Paragraph 3 2 2 provides a configuration for basic MPFB operation For a detailed description of the M...

Page 26: ...nstall a jumper on pins 2 and 3 to enable the PRU W6 1 2 3 W6 selects the MCU operation mode Each 3 pin jumper header set corresponds to an MCU data line While the reset pin is low the reset data values are driven on the data bus D0 D15 The MEVB reset data circuit is open drain a high state is provided via a pull up resistor Each reset data line may be set high H or low L Consult the appropriate M...

Page 27: ...2 No jumper installed the MCU MODCLK signal is pulled high logic 1 via a resistor during reset W17 1 2 No jumper installed the BERR signal is pulled high logic 1 via a resistor during reset W18 1 2 3 Install a jumper on pins 1 and 2 for unrestricted writes to the memory devices in the pseudo ROM sockets U2 U4 W19 1 2 3 Install a jumper on pins 1 and 2 to ground the A19 signal to the MPFB memory ar...

Page 28: ...4 in 635 cm lift the appropriate lever of J5 to release tension on the contacts then insert the bare wire into J5 and close the lever The MEVB requires a 5Vdc 1 0 amp power supply for operation A 1 5 amp fuse is installed on the MPFB 5Vdc power supply input line BLK RED 5V GND J5 CAUTIONS Do not use wire larger than 20 AWG in connector J5 Such wire could damage the connector Turn off MEVB power wh...

Page 29: ...y information see the ICD16 user s manual M68ICD16 D Connect the ICD16 debugger to the MEVB by connecting the integral 10 pin cable assembly of the debugger to MPFB connector J6 Make sure that the red wire of the cable connects to pin 1 of connector J6 Connect the DB 25 parallel port of the ICD16 to the parallel port of your computer The drawing below shows signal assignments for connector J6 For ...

Page 30: ...he following is one possible initialization for the MPB16R3 You may adapt this example to your debugger This initialization enables the maximum system clock frequency and disables the software watchdog while enabling the bus monitor CSBOOT is set to zero wait state and the block size set to 64K starting at 00000 The SRAM is enabled to reside at 10000 with the stack pointer initialized at 103FE and...

Page 31: ...SORBT 7830 Change wait state to zero mdf6 START Display program in PMM window pk 0 Initialize CPU registers a AA b BB e 0000 ix 0000 iy 0000 iz 0000 hr 0000 ir 0000 k 0000 sp 03fe Initialize the stack pointer sk 1 symbol SRAMBAH FFB04 symbol SRAMMCR FFB00 dmmb SRAMBAH 01 Set SRAM base address dmmb SRAMMCR 00 Enable SRAM array dmml 10000 4D6F746F Check SRAM Write Motorola 68HC16 Advanced MCUs dmml ...

Page 32: ...MEVB QUICK START GUIDE 3 8 M68MPB16R3UM D ...

Page 33: ...B type 4 2 LOGIC ANALYZER CONNECTOR SIGNALS The tables of this chapter describe MPFB logic analyzer connector signals if you install an M68MPB916R3 on the MPFB The signal descriptions on J12 J20 are the logic analyzer pin outs on the plastic overlay supplied with the MPB NOTE The signal descriptions in the following tables are for quick reference only The MC68HC916R3 User s Manual MC68HC16R3UM AD ...

Page 34: ...omplement negated contents of the PEPAR register 12 19 PE7 PE0 PORT E I O SIGNALS PRU replacement of the port E function 20 GND GROUND Table 4 2 Logic Analyzer Connector J8 Pin Assignments Pin Mnemonic Signal 1 2 SPARE No connection 3 OE ABG I O PRU OUTPUT ENABLE Input active high when low disables port A port B and port G outputs 4 11 PA7 PA0 PORT A I O SIGNALS PRU replacement of the port A funct...

Page 35: ...T G I O SIGNALS PRU replacement of the port G function 20 GND GROUND Table 4 4 Logic Analyzer Connector J10 Pin Assignments Pin Mnemonic Signal 1 5V 5 VDC POWER Input voltage 5Vdc 1 0 A used by the MEVB logic circuits To make this pin a no connection remove the jumper from jumper header W9 on the MPFB 2 SPARE No connection 3 AS ADDRESS STROBE Active low output signal that indicates whether a valid...

Page 36: ...ts of the MCU bi directional data bus lines 20 GND GROUND Table 4 6 Logic Analyzer Connector J12 Pin Assignments Pin Mnemonic Signal 1 2 SPARE No connection 3 CLKOUT SYSTEM CLOCK OUT Output signal that is the MCU internal system clock 4 BERR BUS ERROR Active low signal that indicates that a memory access error has occurred 5 BKPT DSCLK BREAKPOINT Active low input signal that signals a hardware bre...

Page 37: ...bus sizing between the MCU and external devices 12 DSACK0 DATA AND SIZE ACKNOWLEDGE 0 Active low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices 13 FC2 CS5 FUNCTION CODE 2 Output signal that identifies the processor state and address space of the current bus cycle CHIP SELECT 5 Output signal that selects peripheral or memory devices ...

Page 38: ...orts 20 GND GROUND Table 4 7 Logic Analyzer Connector J13 Pin Assignments Pin Mnemonic Signal 1 5V 5 VDC POWER Input voltage 5Vdc 1 0 A used by the MEVB logic circuits To make this pin a no connection remove the jumper from jumper header W21 on the MPFB 2 SPARE No connection 3 DSACK1 DATA AND SIZE ACKNOWLEDGE 1 Active low input signal that allows asynchronous data transfers and dynamic bus sizing ...

Page 39: ...quished the bus INTERNAL MODULE CHIP SELECT Active low output signal that selects an external emulation device at internally mapped address 10 CSBOOT BOOT CHIP SELECT An active low output chip select for external boot startup ROM 11 CLKOUT SYSTEM CLOCK OUTPUT MCU internal clock output signal 12 A23 CS10 E ADDRESS BUS BIT 23 One bit of the 24 bit address bus CHIP SELECT 10 Output signal that select...

Page 40: ...A16 ADDRESS BUS BITS 18 16 Three bits of the 24 bit address bus 20 GND GROUND Table 4 8 Logic Analyzer Connector J14 Pin Assignments Pin Mnemonic Signal 1 2 SPARE No connection 3 DSACK0 DATA AND SIZE ACKNOWLEDGE 0 Active low input signal that allows asynchronous data transfers and dynamic bus sizing between the MCU and external devices 4 FASTREF FASTREF General purpose input output lines 5 TSC THR...

Page 41: ...18 CONFIGURABLE PULSE WIDTH MODULATION SUBMODULE 19 and 18 creates a variable pulse width output signal at a wide range of frequencies 11 12 CTS16B CTS16A CONFIGURABLE TIMER SINGLE ACTION CHANNEL 16 A and B I O signals that function as single action capture compare channels for the CTM 13 14 CTS14B CTS14A CONFIGURABLE TIMER SINGLE ACTION CHANNEL 14 A and B I O signals that function as single actio...

Page 42: ...e channel for the CTM 7 CTD22 CONFIGURABLE TIMER DUAL ACTION 22 I O signal that functions as double action capture compare channel for the CTM 8 9 CTS6A CTS6B CONFIGURABLE TIMER SINGLE ACTION CHANNEL 6 A and B I O signals that function as single action capture compare channels for the CTM 10 11 CTS8A CTS8B CONFIGURABLE TIMER SINGLE ACTION CHANNEL 8 A and B I O signals that function as single actio...

Page 43: ...ines to the MCU device 12 MAPI VRH VOLTAGE REFERENCE HIGH Input reference supply voltage high line from the MAPI must set jumper on the MPB 13 MAPI VRL VOLTAGE REFERENCE LOW Input reference supply voltage low line from the MAPI must set jumper on the MPB 14 15 AN6 AN7 ANALOG TO DIGITAL CONVERSION 6 and 7 Analog input lines to the MCU device 16 VSSA A D GROUND A D ground reference 17 19 SPARE No co...

Page 44: ...LOCK In master mode the clock signal from the SPI in slave mode the clock signal to the SPI 8 SS SLAVE SELECT Bi directional active low signal that puts the SPI in slave mode 9 RXDB RECEIVE DATA B Serial data input line to serial communication interface B 10 TXDB TRANSMIT DATA B Serial data output line to serial communication interface B 11 RXDA RECEIVE DATA A Serial data input line to serial comm...

Page 45: ...nector J19 Pin Assignments Pin Mnemonic Signal 1 4 SPARE No connection 5 12 GND GROUND 13 19 SPARE No connection 20 GND GROUND Table 4 14 Logic Analyzer Connector J20 Pin Assignments Pin Mnemonic Signal 1 4 SPARE No connection 5 18 GND GROUND 19 SPARE No connection 20 GND GROUND ...

Page 46: ...MEVB SUPPORT INFORMATION 4 14 M68MPB16R3UM D ...

Page 47: ...ter show the MAPI interface connector layout and pin assignments for MPB connectors P1 P2 P3 and P4 Figures 5 1 through 5 5 5 2 MAPI BUS CONNECTORS The connectors required to interface to the MAPI bus are 2 Robinson Nugent 2 X30 plugs P50L 060P AS TGF 2 Robinson Nugent 2 X40 plugs P50L 080P AS TGF 2 500 1 250 2 500 1 250 C L 1 1 1 1 C L C L C L C L C L Figure 5 1 MAPI Interface Connector Layout ...

Page 48: ...3 n n 34 GND CTS14B 35 n n 36 GND CTS16A 37 n n 38 GND CTS16B 39 n n 40 GND CPWM18 41 n n 42 GND CPWM19 43 n n 44 GND GND 45 n n 46 GND GND 47 n n 48 GND GND 49 n n 50 GND GND 51 n n 52 GND GND 53 n n 54 GND ECLK A23 CS10 55 n n 56 GND PC6 A22 CS9 57 n n 58 GND PC5 A21 CS8 59 n n 60 GND PC4 A20 CS7 61 n n 62 GND PC3 A19 CS6 63 n n 64 GND PC2 FC2 CS5 65 n n 66 GND PC1 FC1 67 n n 68 GND PC0 FC0 CS3 ...

Page 49: ...A3 23 n n 24 A4 A5 25 n n 26 A6 A7 27 n n 28 A8 A9 29 n n 30 GND A10 31 n n 32 A11 A12 33 n n 34 A13 A14 35 n n 36 A15 A16 37 n n 38 A17 A18 39 n n 40 GND No Connect 41 n n 42 5V GND 43 n n 44 GND GND 45 n n 46 MISO PMC0 GND 47 n n 48 MOSI PMC1 GND 49 n n 50 SCK PMC2 GND 51 n n 52 SS PMC3 GND 53 n n 54 RXDB PMC4 GND 55 n n 56 TXDB PMC5 GND 57 n n 58 RXDA PMC6 GND 59 n n 60 TXDA PMC7 Figure 5 3 MAP...

Page 50: ...GND 21 n n 22 GND GND 35 n n 36 GND GND 37 n n 38 GND GND 39 n n 40 GND GND 41 n n 42 GND GND 43 n n 44 GND GND 45 n n 46 GND GND 47 n n 48 GND GND 49 n n 50 GND GND 51 n n 52 GND GND 53 n n 54 VSTBY GND 55 n n 56 DSO IPIPE0 GND 57 n n 58 DSI IPIPE1 GND 59 n n 60 HALT GND 61 n n 62 RESET GND 63 n n 64 BERR GND 65 n n 66 BKPT DSCLK GND 67 n n 68 TSC GND 69 n n 70 FREEZE GND 71 n n 72 GND MAPI EXTAL...

Page 51: ...ND DSACK0 25 n n 26 GND DSACK1 27 n n 28 GND AVEC 29 n n 30 GND PE3 31 n n 32 GND DS 33 n n 34 GND AS 35 n n 36 GND SIZ0 37 n n 38 GND SIZ1 39 n n 40 GND R W 41 n n 42 GND FASTREF PF0 43 n n 44 GND IRQ1 PF1 45 n n 46 GND IRQ2 PF2 47 n n 48 GND IRQ3 PF3 49 n n 50 GND IRQ4 PF4 51 n n 52 GND IRQ5 PF5 53 n n 54 GND IRQ6 PF6 55 n n 56 GND IRQ7 PF7 57 n n 58 GND 5V 59 n n 60 No Connect Figure 5 5 MAPI I...

Page 52: ...MAPI SUPPORT INFORMATION 5 6 M68MPB16Y3UM D ...

Page 53: ...6 1 CHAPTER 6 SCHEMATIC DIAGRAMS 6 1 INTRODUCTION This chapter contains the M68MPB916R3 MCU Personality Board MPB schematic diagrams These schematic diagrams are for reference only and may deviate slightly from the circuits on your MPB ...

Page 54: ...JECT LEADER DATE DATE TITLE MPB916R3C SCHEMATIC KATSUTOSHI NAGAI 04 01 97 A REV DWG NO SIZE GEDABV SHEET DWG NO REV GEDTTL A D 3 1 2 C B 4 A D C 3 1 2 4 MPB916R3C 1 OF 8 O 63ASE90957W LAST_MODIFIED Tue Apr 1 08 52 46 1997 BOARD 63ASE90957W O TITLE REVISION STATUS 1 TABLE OF CONTENTS 2 NOTES 6 MCU CLOCK 4 MODULAR ACTIVE PROBE INTERCONNECT P1 P3 3 BYPASS CAPACITORS CLEAN POWER SIGNAL FILTERS 5 MODUL...

Page 55: ...2 INTERRUPTED LINES CODED WITH THE 3 DEVICE TYPE NUMBER IS FOR REFERENCE 4 SPECIAL SYMBOL USAGE 5 INTERPRET DIAGRAM IN ACCORDANCE 6 CODE FOR SHEET TO SHEET REFERENCES INPUT OUTPUT REVISION WITH THE EXCEPTION OF INSTITUTE SPECIFICATIONS CURRENT WITH AMERICAN NATIONAL STANDARDS DENOTES VECTORED SIGNALS DENOTES ACTIVE LOW SIGNAL ONLY THE NUMBER VARIES WITH THE LOGIC BLOCK SYMBOLOGY MANUFACTURER C7 5 ...

Page 56: ...UF C60 0 1UF C59 0 1UF C58 0 1UF C54 0 1UF C53 VSSI VSSA VDDA VSSA VSSA VSSA VDDA GND GND GND GND GND GND VDDI VSSI VDDI 5V W2 E1 W3 W4 AXIAL 1UH L3 5V BYPASS CAPACITORS CLEAN POWER SIGNAL FILTERS CUT TRACE ON BOARD ANALOG SIGNAL FILTERS ADC MODULE VDDA VSSA GENERATION ADC MODULE VDDI VSSI GENERATION 5V AND GND DECOUPLING FOR VDDE OF MCU AND OSCILLATOR VRH VRL SELECTION ADC MODULE FERRITE BEAD FER...

Page 57: ... GND2 GND2 GND2 GND2 L A G O N A 2 RN P50L 080S BS TGF P1 GND GND VSSA 5V VSSA GND 5V 5V GND GND GND MODULAR ACTIVE PROBE INTERCONNECT P1 P3 MAPI BUS P3 MAPI BUS P1 CTD22 CTD20 VSTBY MAPI EXTAL CLKOUT FREEZE TSC BKPT RESET BERR DSI HALT DSO MAPI VRH MAPI VRL AN 7 6 CTM2C CTS6A CTS6B CTS8A CTS8B CTS10A CTS10B CTS12A CTS12B CTS14A CTS14B CTS16A CTS16B CPWM19 CPWM18 CS 10 CS 9 CS 8 CS 0 CS 1 CS 3 CS ...

Page 58: ...S BS TGF VPP4 P4 VSSA VSSA GND GND MAPI BUS P4 MAPI BUS P2 MODULAR ACTIVE PROBE INTERCONNECT P2 P4 A 2 A 4 A 8 A 6 A 11 A 13 A 17 A 15 D 15 D 11 D 13 D 2 D 0 D 4 D 6 D 9 NC DSACK0 DSACK1 DS AS SIZ1 SIZ0 R W D 15 0 A 18 0 NC AN 5 0 VFPE2 MOSI IRQ 7 1 FASTREF AVEC PE3 A 0 D 8 D 1 D 7 D 5 D 3 D 10 D 14 D 12 IRQ 1 IRQ 2 IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 A 3 A 5 A 7 A 9 A 10 A 12 A 14 A 18 A 16 A 1 AN 0 AN...

Page 59: ...OTE 2 WHEN USING MC68HC 9 16R1 CTM8 IS REPLACED CTM7 14 PIN DIP SOCKET FOR 8 OR 14 PIN CANS DIPS MCU CLOCK NOTE 1 PLACE THE CAP BETWEEN VDDSYN XFC AS CLOSE TO MCU PINS AS POSSIBLE FERRITE BEAD XFC VFPE1 VFPE2 TSC FREEZE BKPT DSO DSI CSBOOT VSSSYN AN 5 AN 7 AN 6 MAPI EXTAL XTALOSC TXDA PE3 FASTREF MCUEXTAL NC R W D 15 0 RESET HALT BERR CLKOUT SIZ1 SIZ0 AS DS AVEC DSACK1 DSACK0 IRQ 7 1 CS 10 0 A 18 ...

Page 60: ... NC NC NC CPWM18 CTS16B CTS14A CTS14B CTS16A CPWM19 CTS12B NC NC NC NC NC NC NC A 5 A 9 NC NC NC NC A 8 A 7 A 6 A 4 NC NC NC NC A 2 A 10 1 CTS6A CTS6B CTS8A CTS8B CTS10A CTS10B IRQ 7 1 FASTREF MISO SCK RXDB TXDB RXDA TXDA MOSI SS IRQ 7 IRQ 6 IRQ 5 IRQ 4 IRQ 3 IRQ 2 IRQ 1 A 10 220K 1M 1M 1M 1 2 3 1 2 3 6 16 8 3 5 7 2 4 9 10 11 12 13 14 15 1 15 16 14 13 12 11 10 9 6 7 1 8 5 4 3 2 8 16 5 15 3 14 13 1...

Page 61: ...10UF 3C1 C9 BCAP SMT 3A2 C8 TCAP SMT 25V 1UF 6A4 C7 BCAP SMT 3A1 C6 BCAP SMT 6A4 C5 BCAP SMT 6A3 C4 BCAP SMT 6B2 C3 TCAP SMT 25V 10UF 3D2 C2 TCAP SMT 25V 10UF 3D2 C1 BCAP SMT 3D3 for the entire design Unit Cross Reference IRQ 7 1 5B4 6D4 7C1 MAPI EXTAL 4A1 6A1 MAPI VRH 3B4 4D4 MAPI VRL 3B4 4D4 MISO 5C1 6B4 7C4 MOSI 5B1 6B4 7C4 PE3 5C4 6D4 R W 5C4 6C4 RESET 4B1 6C4 RXDA 5B1 6B4 7B4 RXDB 5B1 6B4 7C4...

Page 62: ...SCHEMATIC DIAGRAMS 6 10 M68MPB16R3UM D ...

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