Motorola M68HC11EVBD User Manual Download

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SUPPORT INFORMATION

M68HC11EVBU/D

6-5

Table 6-4. MCU I/O Port Connectors (P4 and P5) Pin Assignments (continued)

Pin Number

Signal Mnemonic

Signal Name And Description

43,
44,
45,
46,
47,
48,
49,

PE0,
PE4,
PE1,
PE5,
PE2,
PE6,
PE3,

PE7

PORT E (bits 0-7)

–

General purpose input and/or A/D channel

input lines.

VRL

VOLTAGE REFERENCE LOW – Input reference supply voltage
(low) line for the MCU analog-to-digital (A/D) converter.

VRH

VOLTAGE REFERENCE HIGH – Input reference supply voltage
(high) line for the MCU A/D converter.

–

SPARE

Spare pins (see schematic diagram).

57, 58

VCC

+5 Vdc

59, 60

GND

Ground

Summary of Contents for M68HC11EVBD

Page 1: ... REV 3 April 1997 M68HC11EVBU UNIVERSAL EVALUATION BOARD USER S MANUAL Information contained in this document applies to REVision B M68HC11EVBU Universal Evaluation Boards MOTOROLA Inc 1990 1997 All Rights Reserved ...

Page 2: ... against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part Motorola and the Motorola logo are registered trademarks of Motorola Inc Motorola Inc is an E...

Page 3: ...PREFACE Unless otherwise specified all address references are in hexadecimal throughout this manual An asterisk following the signal name denotes that the signal is true or valid when the signal is low ...

Page 4: ......

Page 5: ...Clock Reconfiguration Headers J5 and J6 2 8 2 3 5 Trace Enable Header J7 2 9 2 3 6 SCI Reconfiguration Headers J8 and J9 2 10 2 3 7 SPI Reconfiguration Headers J10 thru J13 2 11 2 3 8 Real Time Clock INT Header J14 2 12 2 3 9 TxD Reconfiguration Header J15 2 13 2 4 REAL TIME CLOCK RAM SERIAL INTERFACE PERIPHERAL 2 14 2 4 1 Diode Jumpers D1 D4 2 15 2 4 2 Test Points TP1 TP6 2 16 2 5 WIRE WRAP AREA ...

Page 6: ... 4 1 Debugging Evaluation 4 3 4 4 2 Alternate Baud Rates 4 3 4 4 3 Monitor Program 4 5 4 5 COMMAND LINE FORMAT 4 6 4 6 MONITOR COMMANDS 4 7 4 6 1 Assembler Disassembler 4 10 4 6 4 Erase All EEPROM Locations 4 15 4 6 6 Execute Subroutine 4 17 4 6 7 Execute Program 4 19 4 6 8 Help 4 20 4 6 9 Load S Records 4 21 4 6 10 Memory Display 4 22 4 6 11 Memory Modify 4 24 4 6 12 Move Memory 4 26 4 6 13 Proce...

Page 7: ...OMM to EVBU 4 42 CHAPTER 5 HARDWARE DESCRIPTION 5 1 INTRODUCTION 5 1 5 2 GENERAL DESCRIPTION 5 1 5 2 1 Microcontroller 5 1 5 2 2 Memory 5 3 5 2 3 Real Time Clock RAM with Serial Interface 5 3 5 2 4 Terminal I O Port Interface 5 3 CHAPTER 6 SUPPORT INFORMATION 6 1 INTRODUCTION 6 1 6 2 CONNECTOR SIGNAL DESCRIPTIONS 6 1 6 3 PARTS LIST 6 6 6 4 DIAGRAMS 6 8 APPENDIX A S RECORD INFORMATION A 1 INTRODUCT...

Page 8: ...gram 6 8 6 2 EVBU Schematic Diagram Sheet 1 of 3 6 9 6 2 EVBU Schematic Diagram Sheet 2 of 3 6 11 6 2 EVBU Schematic Diagram Sheet 3 of 3 6 13 LIST OF TABLES 1 1 EVBU Specifications 1 2 1 2 External Equipment Requirements 1 3 2 1 MCU Mode Select 2 7 3 1 Utility Subroutine Jump Table 3 3 3 2 Interrupt Vector Jump Table 3 5 4 1 Monitor Memory Map Limitations 4 2 4 2 Monitor Program Commands 4 8 6 1 ...

Page 9: ... program is stored on the diskette supplied with the EVBU see file buf32 asm This file may be viewed using any text reader capable of handling a 102K file 1 2 FEATURES EVBU features include An economical means of debugging user assembled code and evaluating MC68HC11A8 E9 711E9 811A8 and 811E2 microcontroller unit MCU devices One line assembler disassembler Host computer downloading capability MC68...

Page 10: ...a Area Holes Approx 3in square 7 62 cm 29 wide x 30 high one tenth inch centers Standoffs Optional 0 75 in 1 905 cm or 1 0 in 2 54 cm 1 4 GENERAL DESCRIPTION The EVBU provides a low cost tool for debugging evaluation of MC68HC11A8 E9 711E9 811A8 and 811E2 MCUs The MC68HC11 MCU device is an advanced single chip MCU with on chip memory and peripheral functions Refer to the MC68HC11 MCU data sheet fo...

Page 11: ...s can be installed on the topside of the EVBU printed circuit board PCB and wire wrapping can be performed on the bottom side of the PCB MCU interfacing is accomplished via the MCU I O port connector to the wire wrap area EVBU operation requires a user supplied 5 Vdc power supply and an RS 232C compatible terminal You must use an RS 232C compatible host computer to download Motorola S records via ...

Page 12: ...852 6106888 Tai Po 852 6668333 INDIA Bangalore 91 80 5598615 ISRAEL Herzlia 972 9 590222 ITALY Milan 39 2 82201 JAPAN Fukuoka 81 92 725 7583 Gotanda 81 3 5487 8311 Nagoya 81 52 232 3500 Osaka 81 6 305 1802 Sendai 81 22 268 4333 Takamatsu 81 878 37 9972 Tokyo 81 3 3440 3311 KOREA Pusan 82 51 4635 035 Seoul 82 2 554 5118 MALAYSIA Penang 60 4 2282514 MEXICO Mexico City 52 5 282 0230 Guadalajara 52 36...

Page 13: ...ARE PREPARATION This paragraph describes the inspection preparation of EVBU components prior to use This description ensures the EVBU components are properly configured before start up The EVBU should be inspected and prepared for proper jumper placements Figure 2 1 illustrates the EVBU connector switch and jumper header locations Diode jumpers DJX and test point TPX locations are also illustrated...

Page 14: ... of operation CAUTION Depending on the application you may need to cut the cut trace shorts on the PCB solder side Use extreme care when cutting the cut trace shorts to avoid cutting adjacent PCB wiring traces Failure to adhere to this CAUTION could result in many hours of troubleshooting and repair time Jumper header locations J1 through J15 provide the following functional capabilities Input Pow...

Page 15: ... TP3 TP4 TP5 J3 P5 DENOTES CUT TRACE SHORT ON PCB SOLDER SIDE DENOTES FABRICATED JUMPER INSTALLED ON JUMPER HEADER DENOTES FEED THRU HOLES ONLY DENOTES FEED THRU HOLES ONLY DENOTES JUMPER HEADER SUPPLIED P3 J1 J4 J5 J6 J7 J8 J9 J10 J11 J12 J13 J14 Figure 2 1 EVBU Connector Switch and Jumper Header Location Diagram ...

Page 16: ... you must supply 5 0 Vdc 50 mA to the input power connector P1 1 2 3 J1 5 VDC 7 5 to 14 0 VDC Fabricated Jumper If a 5 Vdc power supply is not available you can connect an alternate power source 7 5 to 14 0 Vdc to the input power connector P1 To utilize this secondary power source install an MC78L05C voltage regulator at location U1 shown below After installing the voltage regulator move the fabri...

Page 17: ... to pins 1 and 2 of jumper header J2 if you want to jump directly to EEPROM address B600 for user code execution J2 1 2 3 MONITOR LOGIC 0 EEPROM LOGIC 1 Fabricated Jumper If you use the PE0 line for A D operations the loading condition introduced by jumper header J2 may not be desired There are two ways to bypass this potential problem 1 Jumper header J2 is only required at the trailing edge of re...

Page 18: ...red on jumper headers J3 and J4 for this configuration due to the cut trace short on PCB solder side of J4 If the J4 cut trace short is cut you must install a user supplied fabricated jumper on jumper header J4 to return the EVBU to the factory configuration single chip mode Jumper header J3 does not contain a cut trace short J4 J3 1 2 MODA MODB 1 2 Cut Trace Short NOTE If J4 cut trace short is cu...

Page 19: ...d 2 Installed Special Bootstrap Removed 3 Installed Special Test NOTES 1 Installed jumper equals a logic 0 shorted to ground while a missing jumper equals a logic 1 open pull up 2 The cut trace short is present or a jumper is installed on J4 3 The cut trace short and jumper are removed from J4 The EVBU can be reconfigured for either the single chip expanded multiplexed special bootstrap or special...

Page 20: ...ed jumpers shown below J6 J5 1 2 XTAL EXTAL 1 2 NOTE Care should be taken when routing the EXTAL and XTAL signals to a target system environment and or EVBU wire wrap area Additional capacitance and or extra noise could render the resident MCU oscillator non functional For special applications using the MCU EXTAL and XTAL signals in a target system environment or EVBU wire wrap area install fabric...

Page 21: ...talled during debugging operations J7 1 2 PA3 OC5 XIRQ Fabricated Jumper For special applications which use the PA3 OC5 signal remove the fabricated jumper on pins 1 and 2 to avoid interference between the PA3 OC5 signal and the XIRQ signal In this configuration several BUFFALO monitor commands are not available BUFFALO commands which will not function without a jumper installed on J7 are proceed ...

Page 22: ...pplied by the factory J8 1 2 J9 1 2 PD0 RXD PD1 TXD Cut Trace Shorts NOTE If J8 and J9 cut trace shorts are cut you must install user supplied fabricated jumpers on J8 and J9 to return them to the factory configuration When isolation of the PD0 RXD and PD1 TXD signal lines from the MCU SCI to the MC145407 RS 232C driver receiver device are required you must cut the cut trace shorts To return jumpe...

Page 23: ...y J10 1 2 J11 PD4 SCK PD2 MISO J12 PD3 MOSI J13 PD5 SS Cut Trace Shorts NOTE If J10 through J13 cut trace shorts are removed you must install user supplied fabricated jumpers on J10 through J13 to return them to the factory configuration When isolation of the PD4 SCK PD2 MISO PD3 MOSI and PD5 SS signal lines from the MCU SPI to the MC68HC68T1 peripheral device are required cut the solder side trac...

Page 24: ...vice to the MCU XIRQ signal line J14 1 2 XIRQ INT NOTE The INT signal line is a output signal which is connected to the XIRQ input of the MCU XIRQ is also used by the BUFFALO monitor for tracing refer to paragraph 2 3 5 Refer to the jumper header J7 and jumper header J14 descriptions because the respective functions could interfere with each other When connection of the MC68HC68T1 peripheral devic...

Page 25: ...e removal of the external terminal connected to the EVBU terminal port connector P2 J15 1 2 TxD NOTE If J15 cut trace short is cut you may solder a grounding strap between the feed through holes on J15 to return it to the factory configuration When the TxD signal line is required for an external connection you must cut the solder side trace and make the connection to J15 pin 2 When reconfiguration...

Page 26: ...to leap year 32 word by 8 bit RAM Direct interface to Motorola serial peripheral interface SPI Minimum time keeping voltage 2 2 V Burst mode for reading writing successive addresses in clock or RAM Selectable crystal or 50 60 Hz line input Binary coded decimal BCD data contained in registers Buffered clock output for driving CPU clock timer colon or liquid crystal display LCD backplane Power on re...

Page 27: ...trace D4 D1 D2 D3 1 2 1 1 2 2 1 2 1 2 1 2 If the MC68HC68T1 real time clock battery backup feature is required you must cut the D1 D3 feed thru hole cut traces on the PCB solder side and install the following user supplied components on the PCB component side as follows D1 1N4001 diode D2 1N4148 diode D3 1N4148 diode D4 1N4148 diode jumper wire or resistor application dependent A user supplied 3 0...

Page 28: ...ed MC68HC68T1 device installed in socket location U5 These test point consists of six feed thru holes If desired you can install a single pin header post Aptronics 929705 01 01 in each feed thru hole TP1 CLK OUT Clock Output TP2 CPUR CPU Reset TP3 VSYS System Voltage TP4 LINE Line Sense TP5 POR Power On Reset TP6 PSE Power Supply Enable The above test points are provided for user monitoring and wi...

Page 29: ...age DIP device wire wrap sockets strip sockets headers and connectors can be installed Wire wrap components can be installed on the top side of the EVBU and wire wrapping can be performed on the bottom side of the EVBU The use of three quarter or one inch standoffs are recommended for wire wrap pin clearance on the bottom side of the EVBU The standoff mounting holes are shown below P4 P2 WIRE WRAP...

Page 30: ...HARDWARE PREPARATION AND INSTALLATION 2 18 M68HC11EVBU D 29 HOLES GROUND GND BUS 30 HOLES 5 VDC BUS P5 2 1 60 59 Figure 2 2 Wire Wrap Area Top Exploded View ...

Page 31: ...n in Figure 2 3 Both P4 and P5 connectors are wired parallel to each other Connector P4 is primarily used to interface to external equipment or target system Connector P5 is primarily used to interface directly to the EVBU wire wrap area EVBU PCB AREA EVBU WIRE WRAP AREA P4 P5 TOP BOTTOM WIRE WRAP DEVICE SOCKET STANDOFF WIRE WRAP DOUBLE ROW POST USER SUPPLIED USER SUPPLIED USER SUPPLIED CUSTOM WIR...

Page 32: ...host computer is optional for downloading user assembled code to the EVBU via the terminal I O port connector P2 2 6 1 Power Supply EVBU Interconnection The EVBU requires 5 Vdc 50 mA and GND for operation Interconnection of the power supply wiring to the EVBU power supply connector P1 is shown below The power supply cable consists of two 14 22 AWG wires that interconnect 5 Vdc and ground GND from ...

Page 33: ...supply 5 0 Vdc 50 mA max to the input power connector P1 1 2 3 J1 5 Vdc 7 5 to 14 0 Vdc Fabricated Jumper If a 5 Vdc power supply is not available an alternate power source 7 5 to 14 0 Vdc can be connected to the input power connector P1 To utilize this secondary power source install an MC78L05C voltage regulator at location U1 Upon completion of the voltage regulator installation you must reinsta...

Page 34: ...6 for connector pin assignments and signal descriptions of EVBU terminal port connector P2 For those using an IBM PC or Apple Macintosh personal computer PC use a Hayes compatible modem cable to connect the PC to EVBU terminal port connector P2 14 15 16 17 18 19 20 21 22 23 24 25 NC NC NC NC NC NC DTR NC NC NC NC NC 1 2 3 4 5 6 7 8 9 10 11 12 13 GND TXD RXD NC CTS DSR SIG GND DCD NC NC NC NC NC P2...

Page 35: ... SUBMINIATURE CONNECTOR 25 PIN D SUBMINIATURE CONNECTOR 25 D SUBMINIATURE MALE PIN CONNECTORPART S 25 D SUBMINIATURE FEMALE SOCKET CONNECTORPART S 1 CIRCUIT ASSEMBLY CORP CA 25 SMD P 1 CIRCUIT ASSEMBLY CORP CA 25 SMD S 2 ITT CANNON DBSP B25P 3 ANSLEY 609 25P 4 WINCHESTER 49 1125P 2 ITT CANNON DBSP B25S 3 ANSLEY 609 25S 4 WINCHESTER 49 1125S 20 OR 25 CONDUCTOR FLAT RIBBON CABLE 3M 3365 20 OR 3M 336...

Page 36: ...ent DTE This should allow a straight through cable to be used in most setups If an unknown cable is used to connect the EVBU to a host computer a null modem adapter shown below may be required to match the cable to the EVBU terminal port connector A null modem adapter is used to reverse the roles of various data and control signals to make a DTE device appear as a DCE device or vice versa 1 2 3 4 ...

Page 37: ... assignments and signal descriptions of the EVBU MCU I O port connector P4 refer to Chapter 6 2 6 4 Wire Wrap Area MCU Interconnection Wire wrap area to MCU interconnection is accomplished via the EVBU MCU I O port connector P5 Connector P5 is supplied by the user This connector is mounted on the bottom side of the EVBU PCB shown in Figure 2 6 Connector P5 shown in Figure 2 7 is a 60 pin header th...

Page 38: ...37 PB5 A13 PB6 A14 36 l l 35 PB7 A15 PA0 IC3 34 l l 33 PA1 IC2 PA2 IC1 32 l l 31 PA3 OC5 PA4 OC4 30 l l 29 PA5 OC3 PA6 OC2 28 l l 27 PA7 OC1 NC 26 l l 25 PD5 SS PD4 SCK 24 l l 23 PD3 MOSI PD2 MISO 22 l l 21 PD1 TXD PD0 RXD 20 l l 19 IRQ XIRQ 18 l l 17 RESET PC7 AD7 16 l l 15 PC6 AD6 PC5 AD5 14 l l 13 PC4 AD4 PC3 AD3 12 l l 11 PC2 AD2 PC1 AD1 10 l l 9 PC0 AD0 XTAL 8 l l 7 EXTAL STRB R W 6 l l 5 E S...

Page 39: ...ISO 22 l l 21 PD1 TXD PD4 SCK 24 l l 23 PD3 MOSI NC 26 l l 25 PD5 SS PA6 OC2 28 l l 27 PA7 OC1 PA4 OC4 30 l l 29 PA5 OC3 PA2 IC1 32 l l 31 PA3 OC5 PA0 IC3 34 l l 33 PA1 IC2 PB6 A14 36 l l 35 PB7 A15 PB4 A12 38 l l 37 PB5 A13 PB2 A10 40 l l 39 PB3 A11 PB0 A8 42 l l 41 PB1 A9 PE4 44 l l 43 PE0 PE5 46 l l 45 PE1 PE6 48 l l 47 PE2 PE7 50 l l 49 PE3 VRH 52 l l 51 VRL SPARE 54 l l 53 SPARE SPARE 56 l l ...

Page 40: ... This cut trace is used to isolate the resident MCU device VRL pin pin 51 from ground pin 1 when an external VRL signal source is used refer to the schematic diagram Figure 6 2 for additional information The PCB default cut trace is illustrated below PIN 1 CUT PCB SOLDER SIDE U3 PIN 51 U3 Consult the MC68HC11E9 data sheet for specific information pertaining to the use of the VRL pin ...

Page 41: ...ogram consists of five parts or sections as follows 1 Initialization 2 Command interpreter 3 I O routines 4 Utility subroutines 5 Command table 3 2 1 Initialization This part of BUFFALO contains all of the reset initialization code In this section internal RAM locations are set up and the I O channel for the terminal is set up To set up the terminal I O port BUFFALO must determine if the terminal ...

Page 42: ...routines are called ONUART INUART and OUTUART The third set of drivers is for an ACIA and these routines are called ONACIA INACIA and OUTACIA All I O communications are controlled by three RAM locations IODEV EXTDEV and HOSTDEV EXTDEV specifies the external device type 0 none 1 ACIA 2 DUART HOSTDEV specifies which I O port is used for host communications 0 SCI 1 ACIA 3 DUARTB IODEV instructs the s...

Page 43: ...hift binary number into SHFTREG from the right SHFTREG is a 2 byte 4 hexadecimal digits buffer If A register is not hexadecimal location TMP1 is incremented and SHFTREG is unchanged FF88 BUFFAR Read 4 digit hexadecimal argument from input buffer to SHFTREG FF8B TERMAR Read 4 digit hexadecimal argument from terminal device to SHFTREG FF8E CHGBYT Write value if any from SHFTREG 1 to memory location ...

Page 44: ...ndex register X pointing to next byte FFC4 OUTCRL Output ASCII carriage return followed by a line feed FFC7 OUTSTR Output string of ASCII bytes pointed to by address in index register X until character is an end of transmission 04 FFCA OUTST0 Same as OUTSTR except leading carriage return and line feed is skipped FFCD INCHAR Input ASCII character to accumulator A and echo back This routine loops un...

Page 45: ...ver with the standard M68HC11EVB you may change commands as this version of the BUFFALO monitor is contained in EPROM 3 3 INTERRUPT VECTORS Interrupt vectors residing in MCU internal ROM are accessible as follows Each vector is assigned a three byte field residing in EVBU memory map locations 0000 00FF This is where the monitor program expects the MCU RAM to reside Each vector points to a three by...

Page 46: ... routine address at locations 00EF and 00F0 3 The following is an example where the IRQ service routine starts at 0100 00EE 7E 01 00 JMP IRQ SERVICE During initialization BUFFALO checks the first byte of each set of three locations If a 7E jump opcode is not found BUFFALO will install a jump to a routine called STOPIT This assures there will be no uninitialized interrupt vectors which would cause ...

Page 47: ...Memory display MD trace TRACE and help HELP commands may be affected by this problem You can either ignore the problem switch to a slower baud rate or use a different communications program When using the MD or TRACE commands the missing character problem can be resolved by displaying fewer address locations or tracing fewer instructions at a time respectively The monitor program uses the MCU inte...

Page 48: ...r 01 to be written to 4000 to retain compatibility Refer to the buf32 asm file on the EVBU diskette for additional information on DFLOP TARGCO and HOSTCO Since the EVBU has no memory or peripherals located at 4000 these writes should not concern most EVBU users 9800 9801 BUFFALO supports serial I O to a terminal via a ACIA external IC located at 9800 in the memory map During initialization BUFFALO...

Page 49: ...er The second method you assemble code on a host computer and then download it to the EVBU user RAM or EEPROM in Motorola S record format The monitor program is then used to debug the assembled user code A download to EEPROM will work if the baud rate is slow enough to allow EEPROM programming Since erasure and programming both require 10 milliseconds a slow baud rate 300 baud will have to be used...

Page 50: ... Macintosh with a MacTerminal terminal emulator program use the pull down menu to change the baud rate Next press the keyboard CR key to resume communications with the EVBU as follows CR 102B 35 CR At this point all BUFFALO commands should operate normally except the display will be noticeably slower due to the slow baud rate To download the S record file to the EVBU EEPROM type the LOAD T command...

Page 51: ...nt firmware for the EVBU which provides a self contained operating environment The monitor interacts with the user through predefined commands that are entered from a terminal You can use any of the commands supported by the monitor NOTE EVBU contains no hardware to support the host related commands e g ACIA DUART A standard input routine controls the EVBU operation while you enter a command line ...

Page 52: ...ses only 2 Fields are separated by any number of space comma or tab characters 3 All input numbers are interpreted as hexadecimal 4 All input commands can be entered either upper or lower case lettering All input commands are converted automatically to upper case lettering except for downloading commands sent to the host computer or when operating in the transparent mode 5 A maximum of 35 characte...

Page 53: ...are as follows CTRL A Exit transparent mode or assembler CTRL B Send break command to host in transparent mode CTRL H Backspace CTRL J Line feed lf CTRL W Wait freeze screen 1 CTRL X Abort cancel command DELETE Abort cancel command CR Enter command repeat last command NOTES 1 Execution is restarted by any terminal keyboard key 2 When using the control key with a specialized command such as CTRL A ...

Page 54: ...L BULKALL Bulk erase EEPROM CONFIG register 1 CALL address Execute subroutine COPY same as MOVE DUMP same as MD ERASE same as BULK FILL same as BF G address Execute program GO same as G HELP Display monitor commands HOST same as TM LOAD T Download S records via terminal port 2 MEMORY same as MM MD addr1 addr2 Dump memory to terminal MM address Memory modify MOVE addr1 addr2 dest Move memory to new...

Page 55: ...ddress T n Trace 1 FF instructions TM Enter transparent mode TRACE same as T VERIFY T Compare memory to download data via terminal port XBOOT address1 address2 Send program to another M68HC11 via bootstrap mode same as HELP address same as MM address NOTES 1 On newer MC68HC11 mask sets CONFIG can only be changed in special test or bootstrap modes of operation 2 Refer to Appendix A for S record inf...

Page 56: ...ws a Immediate addressing is designated by preceding the address with a sign b Indexed addressing is designated by a comma The comma must be preceded a one byte relative offset even if the offset is 00 and the comma must be followed by an X or Y designating which index register to use e g LDAA 0 X c Direct and extended addressing is specified by the length of the address operand 1 or 2 digits spec...

Page 57: ...disassemble the next opcode address CTRL J Assemble the current line If there isn t a new line to assemble then disassemble the next sequential address location Otherwise disassemble the next opcode address CTRL A Exit the assembler mode of operation Examples ASM 0100 CR 0100 STX FFFF LDAA 55 CR Immediate mode addressing requires 86 55 before operand 0102 STX FFFF STAA C0 CR Direct mode addressing...

Page 58: ...pattern hexadecimal value The BF command lets you repeat a specific pattern throughout a determined user memory range in RAM or EEPROM If an invalid address is specified an invalid address message rom xxxx is displayed on the terminal CRT xxxx invalid address Examples BF 0100 01FF FF CR Fill each byte of memory from 0100 through 01FF with data pattern FF BF B700 B700 0 CR Set location B700 to 0 ...

Page 59: ...kpoints into the user code at the address specified in the breakpoint table Breakpoints are accomplished by the placement of a software interrupt SWI at each address specified in the breakpoint address table The SWI service routine saves and displays the internal machine state then restores the original opcodes at the breakpoint locations before returning control back to the monitor program SWI op...

Page 60: ...9 BR CR Display all current breakpoints 0103 0105 0107 0109 BR 0109 CR Remove breakpoint at address location 0109 0103 0105 0107 0000 BR 0109 CR Clear breakpoint table and add 0109 0109 0000 0000 0000 BR CR Remove all breakpoints 0000 0000 0000 0000 BR E000 CR Only RAM or EEPROM locations can be breakpointed rom E000 Invalid address message 0000 0000 0000 0000 BR 0105 0107 0109 0111 0113 CR Maximu...

Page 61: ...ay loop is built in such that the erase time is 10 ms when running at 2 MHz E clock NOTE No erase verification message will be displayed upon completion of the bulk EEPROM erase operation User must verify erase operation by examining EEPROM locations using the MM or MD command Example BULK CR Bulk erase all MCU EEPROM locations B600 B7FF Prompt indicates erase sequence completed ...

Page 62: ...he erase time is about 10 ms when running at 2 MHz E clock The MC68HC11E9 MCU CONFIG register cannot be changed in normal operating modes NOTE No erase verification message will be displayed upon completion of the bulkall EEPROM and configuration register erase operation User must verify erase operation by examining EEPROM locations or the configuration register location using the MM or MD command...

Page 63: ...tor calls the subroutine so that the first unmatched return from subroutine RTS encountered will return control back to the monitor program Thus any user subroutine can be called and executed via the monitor program Program execution continues until an unmatched RTS is encountered a breakpoint is encountered or the EVBU reset switch S1 is activated pressed EXAMPLE PROGRAM for CALL G P and STOPAT c...

Page 64: ... Execute Subroutine Example CALL 0100 CR Execute program subroutine P 0100 Y DEFE X F4FF A 44 B FE C D0 S 0047 Displays register status at time RTS encountered except P register contains original call address or a breakpoint address if encountered ...

Page 65: ...ion is to begin Execution starts at the current program counter PC address location unless a starting address is specified Program execution continues until a breakpoint is encountered or the EVBU reset switch S1 is activated pressed NOTE Refer to example program shown on page 4 16 and insert breakpoints at locations 0105 and 0107 for the following G command example Example G 0100 CR Begin program...

Page 66: ...e the EEPROM BULKALL Erase EEPROM and CONFIG CALL addr Call user subroutine G addr Execute user code LOAD VERIFY T host download command Load or verify S records MD addr1 addr2 Memory dump MM addr Memory modify Open same address CTRL H or Open previous address CTRL J Open next address SPACE Open next address RETURN Quit addr O Compute offset to addr MOVE s1 s2 d Block move P Proceed continue execu...

Page 67: ... it is possible for the monitor to hang up during a load operation If an S record starting address points to an invalid memory location the invalid address message error addr xxxx is displayed on the terminal CRT xxxx invalid address Examples LOAD T CR LOAD command entered to download data from host computer done to EVBU via terminal port LOAD T CR LOAD command entered error addr E000 Invalid addr...

Page 68: ... is greater than address2 the display defaults to the first address If no addresses are specified 9 lines of 16 bytes are displayed near the last memory location accessed Each displayed line of memory consists of a four digit hexadecimal address applicable to the memory location displayed followed by 16 two digit hexadecimal values contents of the sixteen memory locations followed by the ASCII equ...

Page 69: ... 63 61 6C 20 4F 70 65 72 61 74 69 Logical Operati E660 6F 6E 04 57 68 61 74 3F 04 54 6F 6F 20 4C 6F 6E on What Too Lon E670 67 04 46 75 6C 6C 04 4F 70 D2 20 04 72 6F 6D 2D g Full Op rom E680 04 43 6F 6D 6D 61 6E 64 3F 04 42 62 64 20 61 72 Command Bad ar E690 67 75 60 65 6E 74 04 4E 6F 20 68 6F 73 74 20 70 gument No host p MD 0130 0120 CR 0130 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF MD 0100...

Page 70: ...reated as if RAM Once entered the MM command has several submodes of operation that allow modification and verification of data The following subcommands are recognized CTRL J or SPACE BAR or Examine modify next location CTRL H or or Examine modify previous location Reexamine modify same location CR Terminate MM operation O Compute branch instruction relative offset If an attempt is made to change...

Page 71: ...and backup one location 017F FF AA CR Change data at 017F and terminate MM operation MM 013C CR Display memory location 013C FF 018EO CR 51 Compute offset result 51 013C FF MM 0100 CR Examine location 0100 0100 86 04 B7 01 FC 01 Examine next location s using SPACE BAR MM B700 CR Examine EEPROM location B700 B700 FF 52 CR Change data at location B700 MM B700 CR Reexamine EEPROM location B700 B700 5...

Page 72: ...he user to copy move memory to new memory locations If the destination is not specified the block of data residing from address1 to address2 will be moved up one byte Using the MOVE command on EEPROM locations will program EEPROM cells No messages will be displayed on the terminal CRT upon completion of the copy move operation only the prompt is displayed Example MOVE E000 E0FF 0100 CR Move data f...

Page 73: ...ed breakpoints in a program executed by the G command NOTE Refer to example program shown on page 4 16 for the following P command example Breakpoints have been inserted at locations 0105 and 0107 refer to example on pages 4 16 and 4 17 Example G 0100 CR Start execution at 0100 P 0105 Y DEFE X F4FF A 44 B FE C D0 S 0047 Breakpoint encountered at 0105 Continue execution P CR P 0107 Y DEFE X F4FF A ...

Page 74: ...ister contents P 0108 Y 7982 X FF00 A 44 B 70 C C0 S 0047 P 0108 0100 CR Modify P register contents RM X CR Display X register contents P 0100 Y 7982 X FF00 A 44 B 70 C C0 S 0047 X FF00 1000 CR Modify X register contents RM CR Display P register contents P 0100 Y 7982 X 1000 A 44 B 70 C C0 S 0047 P 0100 SPACE BAR Display remaining registers Y 7982 SPACE BAR X 1000 SPACE BAR A 44 SPACE BAR B 70 SPA...

Page 75: ...d is used to set the user PC The STOPAT command has an advantage over breakpoints in that a stop address can be a ROM location while breakpoints only operate in RAM or EEPROM locations Since the STOPAT command traces one instruction at a time with a hidden return to the monitor after each user instruction some user programs will appear to execute slowly The stop address specified in the STOPAT com...

Page 76: ... The trace command operates by setting the OC5 interrupt to time out after the first cycle of the first user opcode fetched NOTE The RD command was used to set the user PC register to FF85 prior to starting the following trace examples SINGLE TRACE EXAMPLE T CR JMP E1F7 P E1F7 Y FFFF X FFFF A 44 B FF C 10 S 0046 MULTIPLE TRACE EXAMPLES T 2 CR PSHA P E1F8 Y FFFF X FFFF A 44 B FF C 10 S 0046 PSHB P ...

Page 77: ...e ignored by the EVBU until the exit character is entered from the terminal The TM subcommands are as follows CTRL A Exit from transparent mode CTRL B Send break to host computer NOTE TM command can only be used if a host I O port is installed on the EVBU wire wrap area Example TM CR Enter transparent mode appslab login bill CR Host computer login response Password xxxxxxxx CR Host computer passwo...

Page 78: ...he verify command The VERIFY command is similar to the LOAD command except that the VERIFY command instructs the EVBU to compare the downloaded S record data to the data stored in memory EXAMPLES DESCRIPTION VERIFY T CR Enter verify command Done Verification completed VERIFY T CR Enter verify command Mismatch encountered error addr E000 Error message displaying first address that failed to verify ...

Page 79: ...If only one address is provided the address will be used as the starting address and the block size will default to 256 bytes If no addresses are provided the block of addresses from C000 through C0FF is assumed by the BUFFALO monitor program NOTE The MC68HC11A8 MCU requires a fixed block size of 256 bytes for bootloading while the MC68HC11E9 MCU can accept a variable length block of 1 to 512 byte...

Page 80: ...er XBOOT command and addresses without pressing carriage return CR key as follows XBOOT B600 B6FF Do not press the ENTER key 3 Remove previously installed fabricated jumper from jumper header J9 4 Connect jumper wire from jumper header J9 pin 2 to RxD input of target MC68HC11 MCU device 5 Reset target MC68HC11 MCU device in bootstrap mode 6 Press carriage return CR key to invoke XBOOT command Sinc...

Page 81: ... Operands must be separated by one or more space or tab characters Any characters after a valid mnemonic and associated operands are assumed to be comments and are ignored Addressing modes are designated as follows Immediate addressing is designated by preceding the address with a sign Indexed addressing is designated by a comma The comma must be preceded a one byte relative offset even if the off...

Page 82: ...ays as BCS If the assembler tries to assemble at an address that is not in RAM or EEPROM an invalid address message rom xxxx is displayed on the terminal CRT xxxx invalid address Assembler disassembler subcommands are as follows If the assembler detects an error in the new source line the assembler will output an error message and then reopen the same address location Assemble the current line and...

Page 83: ... PC or Macintosh a serial interface cable to connect the personal computer to the EVBU connector P2 and the EVBU with an applicable power source A software terminal emulator program is also required Some typical terminal emulator programs for the IBM PC include PROCOMM and KERMIT Typical terminal emulator programs for the Macintosh include MacTerminal and Red Ryder S record programs for downloadin...

Page 84: ...ck on OK 2 Select the following menu Compatibility Settings Baud rate 9600 same as EVBU Bits per Character 8 Bits Parity None Handshake None Connection Modem or Another Computer Connection Port Modem or Printer Click on OK 3 Select the following menu File Transfer Settings Settings for Pasting or Sending Text Word Wrap Outgoing Text File Transfer Protocol Text Settings for Saving Lines Off Top Ret...

Page 85: ...the following message is displayed done NOTE The EVBU may have to be reset to regain monitor control depending on the version of BUFFALO and how the file transfer program terminates the download operation There is a problem which occurs when using the EVBU with the MacTerminal program when performing a downloading operation The MacTerminal program sends a carriage return and line feed characters a...

Page 86: ...pically as follows 9600 baud no parity 8 bits 1 stop bit full duplex 3 Apply power to EVBU 4 Press Apple Macintosh computer keyboard carriage return CR key to display applicable EVBU monitor prompt 5 Enter EVBU monitor download command as follows LOAD T CR 6 Operate pull down File menu and select choose Send File ASCII 7 Use dialog box and select applicable S record object file Click on Send Motor...

Page 87: ...ET BAUD 9600 CR Set IBM PC baud rate Kermit MS CONNECT CR Connect IBM PC to EVBU Connecting to host type Control C to return to PC CR LOAD T CR EVBU download command via terminal port entered CTRL C Kermit MS PUSH CR The IBM Personal Computer DOS Version X XX C Copyright IBM Corp 1981 1982 1983 C TYPE File Name COM1 CR Motorola S record file name C EXIT CR S record downloading completed Kermit MS ...

Page 88: ... Yes Pace Character 0 Character pacing 25 1 1000 second Line Pacing 10 CR Translation None LF Translation None Save above settings to disk for future use 4 Apply power to EVBU 5 Press IBM PC keyboard carriage return CR key to display applicable EVBU monitor prompt 6 Enter EVBU monitor download command as follows LOAD T CR 7 Instruct PROCOMM to send the S record file by pressing the Pg Up key on th...

Page 89: ...onfigured for the single chip mode of operation The single chip mode is accomplished by 5 Vdc applied to the MCU MODB pin and ground applied to the MCU MODA pin during reset The EVBU can be reconfigured for either the expanded multiplexed special bootstrap or special test modes of operation via jumper headers J3 and J4 For expanded multiplexed and special test modes of operation additional circuit...

Page 90: ...chip RAM locations 0048 00FF leaving approximately 325 bytes of RAM for the user i e 0000 0047 and 0100 01FF 512 bytes of EEPROM are also available for user programs PD0 PD5 PC0 PC7 PE0 PE7 TXD PD1 RXD PD0 TXD RXD CONTROL MCU PD2 PD5 XIRQ WIRE WRAP AREA TERMINAL BATTERY BACKUP REAL TIME CLOCK RAM SERIAL INTERFACE RS 232C DRIVERS AND RECEIVER PB0 PB7 PA0 PB7 Figure 5 1 EVBU Block Diagram ...

Page 91: ... with Serial Interface An HCMOS real time clock calendar 32 x 8 static RAM and a synchronous serial interface for MCU communications is accomplished via a user supplied MC68HC68T1 device U5 Refer to the MC68HC68T1 Real Time Clock plus RAM with Serial Interface data sheet MC68HC68T1 D for additional device information 5 2 4 Terminal I O Port Interface The EVBU uses a 5 volt RS 232C driver receiver ...

Page 92: ...HARDWARE DESCRIPTION 5 4 M68HC11EVBU D ...

Page 93: ... P5 is used to interconnect the MCU I O to the EVBU wire wrap area Connector P1 interconnects an external power supply to the EVBU Connector P2 is provided to facilitate interconnection of a terminal and or host computer Connector P3 connects an external battery for battery backup purposes Pin assignments for the above connectors P1 through P5 are identified in Tables 6 1 through 6 4 Connector sig...

Page 94: ... 8 6 DSR DATA SET READY An output signal used to indicate an on line in service active status This pin is connected to both CTS pin 5 and DCD pin 8 7 SIG GND SIGNAL GROUND This line provides signal ground or common return connection common ground reference between the EVBU and RS 232C compatible terminal 8 DCD DATA CARRIER DETECT An output signal used to indicate an acceptable received line carrie...

Page 95: ...tput signal used to indicate an instruction is starting 4 STRA AS STROBE A An input edge detecting signal for parallel I O device handshaking in the single chip mode of operation ADDRESS STROBE An output control line used to demultiplex port C address and data signals in the expanded multiplexed mode of operation 5 E ENABLE CLOCK An output control line used for timing reference E clock frequency i...

Page 96: ... to request asynchronous non maskable interrupts to the MCU 19 IRQ INTERRUPT REQUEST An active low input line used to request asynchronous interrupts to the MCU 20 21 22 23 24 25 PD0 RXD PD1 TXD PD2 MISO PD3 MOSI PD4 SCK PD5 SS PORT D bits 0 5 General purpose I O lines These lines can be used with the MCU Serial Communications Interface SCI and Serial Peripheral Interface SPI 26 27 PA7 OC1 PA6 OC2...

Page 97: ...PE0 PE4 PE1 PE5 PE2 PE6 PE3 PE7 PORT E bits 0 7 General purpose input and or A D channel input lines 51 VRL VOLTAGE REFERENCE LOW Input reference supply voltage low line for the MCU analog to digital A D converter 52 VRH VOLTAGE REFERENCE HIGH Input reference supply voltage high line for the MCU A D converter 53 56 SPARE Spare pins see schematic diagram 57 58 VCC 5 Vdc 59 60 GND Ground ...

Page 98: ...apacitor 1 0 µF 50 Vdc 20 C15 C16 Capacitor 10 pF 50 Vdc 20 D2 user supplied diode Diode jumper feed thru holes with trace For RTC battery backup cut solder side cut trace and install 1N4001 diode D1 D3 D4 user supplied diodes Diode jumper feed thru holes with trace For RTC battery backup cut solder side cut trace and install three 1N4148 diodes J1 J2 Header jumper single row post 3 pin Aptronics ...

Page 99: ...5 1 4W R6 Resistor 22M ohm 5 1 4W RN1 RN2 Resistor five 47k ohm Allen Bradley 106A473 S1 Switch pushbutton SPDT ITT D60303 TP1 TP6 user supplied header Test point feed thru hole 6 each Header single row post 1 pin Aptronics 929705 01 01 U1 user supplied regulator I C MC78L05C voltage regulator low current U2 I C MC34064 voltage detector 3 80 4 20 Vdc U3 I C MC68HC11E9FN1 MCU U4 I C MC145407 5V onl...

Page 100: ...SUPPORT INFORMATION 6 8 M68HC11EVBU D 6 4 DIAGRAMS Figure 6 1 is the EVBU parts location diagram Figure 6 2 is the EVBU schematic diagram Figure 6 1 EVBU Parts Location Diagram ...

Page 101: ...SUPPORT INFORMATION M68HC11EVBU D 6 9 Figure 6 2 EVBU Schematic Diagram Sheet 1 of 3 ...

Page 102: ...SUPPORT INFORMATION 6 10 M68HC11EVBU D ...

Page 103: ...SUPPORT INFORMATION M68HC11EVBU D 6 11 Figure 6 2 EVBU Schematic Diagram Sheet 2 of 3 ...

Page 104: ...SUPPORT INFORMATION 6 12 M68HC11EVBU D ...

Page 105: ...SUPPORT INFORMATION M68HC11EVBU D 6 13 Figure 6 2 EVBU Schematic Diagram Sheet 3 of 3 ...

Page 106: ...SUPPORT INFORMATION 6 14 M68HC11EVBU D ...

Page 107: ... and the second the low order 4 bits of the byte The 5 fields which comprise an S record are shown below TYPE RECORD LENGTH ADDRESS CODE DATA CHECKSUM where the fields are composed as follows Field Printable Characters Contents Type 2 S record type S0 S1 etc Record length 2 The count of the character pairs in the record excluding the type and record length Address 4 6 or 8 The 2 3 or 4 byte addres...

Page 108: ...NOTE The EVBU monitor supports only the S1 and S9 records All data before the first S1 record is ignored Thereafter all records must be S1 type until the S9 record terminates data transfer An S record format module may contain S records of the following types S0 The header record for each block of S records The code data field may contain any descriptive information identifying the following block...

Page 109: ...030000FC The above module consists of an S0 header record four S1 code data records and an S9 termination record The S0 header record is comprised of the following character pairs S0 S record type S0 indicating a header record 06 Hexadecimal 06 decimal 6 indicating six character pairs or ASCII bytes follow 00 00 Four character 2 byte address field zeroes 48 44 52 ASCII H D and R HDR 1B Checksum of...

Page 110: ... are ended with checksums 13 and 52 respectively The fourth S1 code data record contains 07 character pairs and has a checksum of 92 The S9 termination record is explained as follows S9 S record type S9 indicating a termination record 03 Hexadecimal 03 indicating three character pairs 3 bytes follow 00 00 Four character 2 byte address field zeroes FC Checksum of S9 record Each printable character ...

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