Motorola M68HC11EVBD, User Manual

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OPERATING INSTRUCTIONS
4-10 M68HC11EVBU/D
ASM Assembler/Disassembler
4.6.1 Assembler/Disassembler
ASM [<address>]
where:
<address> is the starting address for the assembler operation. Assembler operation
defaults to internal RAM if no address is given.
The assembler/disassembler is an interactive assembler/editor. Each source line is converted into
the proper machine language code and is stored in memory overwriting previous data on a line-
by-line basis at the time of entry. In order to display an instruction, the machine code is
disassembled and the instruction mnemonic and operands are displayed. All valid opcodes are
converted to assembly language mnemonics. All invalid opcodes are displayed on the terminal
CRT as "ILLOP".
The syntax rules for the assembler are as follows: (a.) All numerical values are assumed to be
hexadecimal. Therefore no base designators (e.g., $ = hex, % = binary, etc.) are allowed. (b.)
Operands must be separated by one or more space or tab characters. (c.) Any characters after a
valid mnemonic and associated operands are assumed to be comments and are ignored.
Addressing modes are designated as follows: (a.) Immediate addressing is designated by
preceding the address with a # sign. (b.) Indexed addressing is designated by a comma. The
comma must be preceded a one byte relative offset (even if the offset is 00), and the comma must
be followed by an X or Y designating which index register to use (e.g., LDAA 0,X). (c.) Direct
and extended addressing is specified by the length of the address operand (1 or 2 digits specifies
direct, 3 or 4 digits specifies extended). Extended addressing can be forced by padding the
address operand with leading zeros. (d.) Relative offsets for branch instructions are computed by
the assembler. Therefore the valid operand for any branch instruction is the branch-if-true
address, not the relative offset.
When a new source line is assembled, the assembler overwrites what was previously in memory.
If no new source line is submitted, or if there is an error in the source line, then the contents of
memory remain unchanged. Four instruction pairs have the same opcode, so disassembly will
display the following mnemonics:
Arithmetic Shift Left (ASL)/Logical Shift Left (LSL) displays as ASL
Arithmetic Shift Left Double (ASLD)/Logical Shift Left Double (LSLD) displays as LSLD
Branch if Carry Clear (BCC)/Branch if Higher or Same (BHS) displays as BCC
Branch if Carry Set (BCS)/Branch if Lower (BLO) displays as BCS