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MELSEC-Q
3 SPECIFICATIONS
(2) Details of output signals (programmable controller CPU
QD60P8-G)
The following table indicates the ON/OFF timings and functions of the output
signals.
Device
No.
Signal name
Details
Initial
value
*1
Y1
Operating condition
setting request flag
OFF: No operating
condition
setting
request
ON : Operating
condition
setting
request
• This signal turns ON to make the "comparison output
setting value" and other setting data of the buffer
memory valid.
• When this signal turns ON, the setting data are reflected
on the module.
• When this signal turns ON, the "sampling pulse
number", "accumulating count value" or "input pulse
value" assigned to the buffer memory for each channel
is reset.
• When this signal is turned ON in the sequence program,
it should be kept ON for longer than 10ms.
• For details on the ON/OFF timing of this signal, refer to
the item of the input signal (X1).
OFF
Y8 CH1
Y9 CH2
YA CH3
YB CH4
YC CH5
YD CH6
YE CH7
YF CH8
Error reset
request
OFF: No error reset
request
ON : Error reset
request
• If the error occurrence signal (X8 to XF) has turned ON
due to the error occurrence, turning ON this signal
clears that error.
• For details on the ON/OFF timing of this signal, refer to
the item of the input signal (X8 to XF).
OFF
Y10 CH1
Y11 CH2
Y12 CH3
Y13 CH4
Y14 CH5
Y15 CH6
Y16 CH7
Y17 CH8
Comparison
signal reset
request
OFF: No
comparison
signal reset
request
ON : Comparison
signal reset
request
• If the accumulating counter comparison flag (X10 to
X17) has turned ON, turning ON this signal clears the
accumulating counter comparison flag.
• For details on the ON/OFF timing of this signal, refer to
the item of the input signal (X10 to X17).
OFF
Y18 CH1
Y19 CH2
Y1A CH3
Y1B CH4
Y1C CH5
Y1D CH6
Y1E CH7
Y1F CH8
Count
enable
OFF: Count
operation
stop
ON : Count
operation
start
• This signal turns ON when count operation is started.
• When this signal turns ON, the count operation of the
"sampling pulse number", "accumulating count value" or
"input pulse value" assigned to the buffer memory for
each channel is started.
• For details on the ON/OFF timing of this signal, refer to
the item of the input signal (X1).
OFF
*1: Initial value set at power-on or when the programmable controller CPU is reset.
Summary of Contents for QD60P8-G
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Page 18: ...1 4 1 4 MELSEC Q 1 OVERVIEW MEMO ...
Page 95: ...7 12 7 12 MELSEC Q 7 PROGRAMMING MEMO ...
Page 115: ...9 7 9 7 MELSEC Q 9 TROUBLESHOOTING MEMO ...
Page 121: ...App 2 App 2 MELSEC Q APPENDIX MEMO App ...
Page 124: ...Index 3 Index 3 MEMO ...
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