Mitsubishi A2USCPU(S1), User Manual

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APP - 34
APPENDICES
*: Usable with AnN and AnA which are compatible with SFC.
For the AnN and AnA which are compatible with SFC, refer to the MELSAP-ll Programming Manual.
Table App2.2 Special Register List (Continue)
Number Name Description Details Applicable CPU
D9052 Error step
Step number in which
an error occurred.
• Stores the step number in which error 84 occurred in
the SFC program in BIN code.
Stores "0" when errors 80, 81 and 82 occurred.
Stored the block starting step number when error 83
occurred.
—
Usable with
AnN*, AnA*,
AnU, A2S,
QCPU-A
(A Mode), A2C,
A0J2H, AnS,
AnSH, A1FX
and A52G.
D9053 Error transfer
Transfer condition
number in which an
error occurred. • Stores the transfer condition number in which error 84
occurred in the SFC program in BIN code.
Stored "0" when errors 80, 81, 82 and 83 occurred. —
D9054
Error sequence
step
Sequence step
number in which an
error occurred. • Stores the sequence step number of transfer condition
and operation output in which error 84 occurred in the
SFC program in BIN code. —
D9055
Status latch
execution step
number
Status latch execution
step number
• Stores the step number when status latch is executed.
• Stores the step number in a binary value if status latch
is executed in a main sequence program.
• Stores the block number and the step number if status
latch is executed in a SFC program.
—
Usable with
AnA, A2AS,
AnA bpard, AnU
and QCPU-A
(A Mode).
D9060
Software
version Software version of
internal system
Stores the software version of the CPU module's internal
system in ASCII codes.
Example: Stores "41
H
" for version A.
Note)The software version of the internal system may be
different from the version marked on the housing.
*5: This function is available with the CPU of the
following S/W versions or later.
Can be used
only with AnU,
A2US, or AnSH.
*5
CPU Type Name Software Version
A2ACPU (P21/R21),
A2ACPU-S1 (P21/R21) S/W version W
(Manufactured in July, 1998)
A3ACPU (P21/R21)
S/W version X
(Manufactured in July, 1998)
A2UCPU (S1),
A3UCPU, A4UCPU S/W version H
(Manufactured in July, 1998)
A1SJHCPU,
A1SHCPU, A2SHCPU S/W version H
(Manufactured in May, 1998)
A2USCPU (S1)
S/W version Y
(Manufactured in July, 1998)
A2USHCPU-S1
S/W version E
(Manufactured in July, 1998)
D9061
Communication
error code
0: Normal
1: Initial data error
2: Line error
• Stores error code when M9061 is turned on
(communication with I/O modules or remote terminal
modules fails).
• 1 .......Total number of stations of I/O modules or
remote terminal modules or number of retries is
not normal. Initial program contains an error.
• 2 .......Cable breakage or power supply of I/O modules
or remote terminal modules is turned off.
—
Usable with
A2C and A52G.
Block No.
(BIN)
Step No.
(BIN)
Higher 8 bits Lower 8 bits