14
1 COMMON ITEMS
1.3 MELSEC Data Link Functions
• Accessing the other CPU
The following table shows the accessible devices when accessing the other CPUs (that is a CPU module and a C Controller
module in a multiple CPU system).
: Accessible,
: Not accessible
No.
Access target CPU
(1)
RCPU
(2)
R12CCPU-V
Device
Access method
Access target CPU
(1)
(2)
Input relay
X
Batch/random
Output relay
Y
Batch/random
Latch relay
L
Batch/random
Internal relay
M
Batch/random
Special relay
SM
Batch/random
Annunciator
F
Batch/random
Timer (Contact)
T
Batch/random
Long timer (Contact)
LT
Batch/random
Timer (Coil)
T
Batch/random
Long timer (Coil)
LT
Batch/random
Counter (Contact)
C
Batch/random
Long counter (Contact)
LC
Batch/random
Counter (Coil)
C
Batch/random
Long counter (Coil)
LC
Batch/random
Timer (Current value)
T
Batch/random
Long timer (Current value)
LT
Batch/random
Counter (Current value)
C
Batch/random
Long counter (Current value)
LC
Batch/random
Data register
D
Batch/random
Special register
SD
Batch/random
Index register
Z
Batch/random
Long index register
LZ
Batch/random
File register
R
Batch/random
ZR
Batch/random
Refresh data register
RD
Batch/random
Link relay
B
Batch/random
Link register
W
Batch/random
Link special relay
SB
Batch/random
Retentive timer (Contact)
ST
Batch/random
Long retentive timer (Contact)
LST
Batch/random
Retentive timer (Coil)
ST
Batch/random
Long retentive timer (Coil)
LST
Batch/random
Link special register
SW
Batch/random
Edge relay
V
Batch/random
Own station random access buffer
Batch/random
Retentive timer (Current value)
ST
Batch/random
Long retentive timer (Current value)
LST
Batch/random
Remote register for sending
RWw
Batch/random
Remote register for receiving
RWr
Batch/random
Own station buffer memory
Batch/random
Link direct device (Link input)
Jn\X
Batch/random
Link direct device (Link output)
Jn\Y
Batch/random
Link direct device (Link relay)
Jn\B
Batch/random
Link direct device (Link register)
Jn\W
Batch/random
Summary of Contents for MELSEC iQ-R C
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