Key Components Description and Operation
UG0557 User Guide Revision 4.0
20
JTAG_SEL:
The JTAG state machine is multiplexed with the CM3 debug port. JTAG_SEL is used to
switch between JTAG programming (high) and CM3 debug (low). When using the CM3 debug port, an
option is available to switch to serial wire debug port.
RVI Header:
A 10 × 2 RVI header is provided on the board for debugging. This header allows plugging in
the Keil ULINK debugger or IAR J-Link debugger to easily debug or configure the Cortex-M3 processor
during board power-up.
FTDI_JTAG_SEL:
The SmartFusion2 device on the Advanced Development Kit can be programmed
either using the JTAG header or the RVI header. FTDI_JTAG_SEL is used to switch between
programming the device using the JTAG header (high) or the RVI header (low).
FLASH_GOLDEN_N:
This
signal is always tied high to the 3.3V VCCIO_HPC_VADJ supply. It indicates
that the SPI is in slave mode.
FlashPro4 Programming Header:
The SmartFusion2 device on this Advanced Development Kit can be
programmed using a FlashPro4 programmer. In addition, SoftConsole uses FlashPro4 for software
debugging.
The following table lists jumpers to be selected for various types of programming.
For more information, see the Board Level Schematics document (provided separately).
4.8
FTDI Interface
The FT4232H chip is a USB 2.0 high-speed (480 Mbps) to UART/MPSSE interface with the following key
features.
•
Single-chip USB-to-quad serial ports in various configurations
•
Entire USB protocol handled on the chip without requiring USB-specific firmware programming
•
USB 2.0 high-speed (480 Mbps) and full-speed (12 Mbps) compatibility
•
Two MPSSEs on channel A and channel B to simplify synchronous serial protocol (USB to JTAG,
I2C, SPI, or bit-bang) design
•
Fully assisted hardware handshaking and X-On/X-Off software handshaking
•
+1.8 V (chip core) and +3.3 V I/O interfacing with +5 V tolerance
4.9
System Reset
The M2S_RSTB signal (active-low) is generated by the
SW6
push-button switch, or by the U21
(DS1818) or U22 (TPS3808G09) chips. DEVRST_N is an input-only reset pad that allows assertion of a
full reset to the chip at any time.
DS1818 maintains reset till 150 milliseconds after the 3.3 V supply returns to intolerance. The
TPS3808G09DBVR device monitors the voltage at the VDD_REG terminal. If the voltage at this terminal
sense-drops below the threshold voltage of 0.9 V, the M2S_RSTB signal is asserted.
Table 7 •
Programming Jumper Selection
J121
J124
J125
J32
Function
X
X
X
L
IAR debugging
X
L
X
H
FP4 JTAG programming
H
H
X
H
FTDI JTAG programming (embedded
FlashPro5 programming)
L
X
X
H
FTDI SPI slave programming
X
X
L
X
FTDI SPI-0 programming
X
X
H
X
FTDI SPI-1 programming
