Key Components Description and Operation
UG0557 User Guide Revision 4.0
19
The following figure shows the SmartFusion2 Marvell PHY interface.
Figure 12 • Marvell PHY Interface
For more information, see the Board Level Schematics document (provided separately).
4.7
Programming
SmartFusion2 SoC FPGAs support multiple programming interfaces and can address a wide range of
platform requirements. A SmartFusion2 device can be programmed through the JTAG and SPI
interfaces.
The dedicated programming SPI port can operate in SPI slave or SPI master modes.
For more information, see
SmartFusion2 and IGLOO2 Programming User Guide
The following figure shows the programming interface of the SmartFusion2 Advanced Development
Board.
Figure 13 • Programming Interface
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