Microchip Technology ADM00732, User Manual

Page: 29 / 78

HV7358DB1 GUI Operation

2020 Microchip Technology Inc. DS50002951A-page 29
3.4.4 Transmit Clock Frequency Configuration Window
The “Transmit Clock Frequency” box is shown below in Figure 3-8 .
F
TCK
is the external frequency. The internal clock frequency is F
C
. F
C
is a function of
F
TCK
, PEN and mode setting.
The frequency choice is a function of the PEN variable. When PEN =
1
, it turns the PLL
on. The frequency selections for both PEN choices are shown below.
If the PLL mode is off (PEN =
0
), then the external frequency choices are 80 MHz,
120 MHz, 160 MHz or 200 MHz. They are shown on the left side of Figure 3-8 .
If the PLL mode is on (PEN =
1
), the external frequency choices are 30 MHz, 40 MHz,
60 MHz or 80 MHz. They are shown on the right side of Figure 3-8 . When in PLL mode,
the frequency selections are on the left of Figure 3-8 .
In B mode with PEN =
0
, the PLL is disabled and the internal clock frequency will be:
EQUATION 3-1: B MODE, NO PLL
If PEN =
1
, the PLL circuitry is enabled; then, the I
2
C parameter, “
N
”, will be part of the
equation:
EQUATION 3-2: B MODE WITH PLL
In CW-Mode, the TX
(x)
output frequency will be:
EQUATION 3-3: CW MODE
In CW mode, the PLL function cannot be used. Therefore, PEN and the PLL are
disabled.
Choose the frequency by clicking on the appropriate box, then click on the
Set CLK + FPGA
button.
FIGURE 3-8: Transmit Clock Frequency Window.
F
C
= F
TCK
F
C
= F
TCK
* N
F
CW
= F
TCK
/(2 * CWFD)
PEN =
0
PEN =
1