HV7358DB1 GUI Operation
2020 Microchip Technology Inc.
DS50002951A-page 27
3.4.1.3
SLEEP (SLEEP MODE ENABLE) PIN
If the SLEEP pin is enabled, then the device is in power-saving mode. All the internal
registers’ data will be preserved and the internal clocks will freeze. The I
2
C interface is
still active.
TABLE 3-6:
SLEEP LOGIC
3.4.1.4
SPIB (SPI FAST PROGRAMMING INTERFACE) PIN
This pin switches between the SPI Broadcast mode and the Daisy-Chain mode.
TABLE 3-7:
SPIB LOGIC
3.4.1.5
PEN (PLL ENABLE) PIN
PEN is an input logic pin that can enable or disable the internal PLL. The PEN pin
function can be changed by the PLLEN and PSEL I
2
C signals. PSEL determines if the
PEN or PLLEN bit in the I
2
C register actually controls the PLL.
TABLE 3-8:
PEN LOGIC
3.4.1.6
SET BUTTON
Sends the selected data to the HV7358 data input pins.
Select the signals appropriate for your application and press the
SET
button.
3.4.1.7
DISC BUTTON
The
DISC
button will send a pulse to the HV7358 that activates the internal V
PP
and
V
NN
switches that discharge their respective supply rails.
These switches have a 5 mA capability and are meant to discharge the bypass caps
only. The supplies need to be turned off before activating the discharge switches.
SLEEP
HV7358 State
0
Enabled/Active
1
Sleep/Low Power
SPIB
Mode
0
Daisy-Chain
1
SPI Broadcast
PEN
PLLEN
PSEL
PLL Control
Signal
Internal PLL
0
0
0
PEN
Disabled
1
0
0
PEN
Enabled
0
1
0
PEN
Disabled
1
1
0
PEN
Enabled
0
0
1
PLLEN
Disabled
1
0
1
PLLEN
Disabled
0
1
1
PLLEN
Enabled
1
1
1
PLLEN
Enabled
Summary of Contents for ADM00732
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