has to be in the range of 24…30 V. The counter outputs are
equipped with pull-up resistors (R
UP
= 4.7 k
Ω
).
For programming the timers see chapter 4.1 on page 28.
3.7.1 Wiring of the Counters
Notes:
Output OUT_2 is designed as an “Open Collector” output, i.e.
as soon as the output is conducting (logic “1”), the load R
L
is
connected to ground (GND_EXT). Logic “0” means that the out-
put is in a high-impedance state.
The polarity of the input signals (CLK_x and GATE_x) is inverted
by the opto-couplers.
All counter signals require a reference to external ground
GND_EXT (pins 9, 11, 59).
The inputs CLK_x and GATE_x have been designed for a voltage
level of +24 V (R
v
= 3 k
Ω
).Note for I
F
: 7.5 mA
≤
I
F
≤
10 mA.
The max. output current of opto-isolated versions may not ex-
ceed I
Out
= 30 mA.
