DS33R11 Ethernet Mapper with Integrated T1/E1/J1 Transceiver
70 of 344
The X86 received frame is aborted if:
•
If 7d,7E is detected. This is an abort packet sequence in X.86.
•
Invalid FCS is detected.
•
The received frame has less than 6 octets.
•
Control, SAPI and address field are mismatched to the programmed value.
•
Octet 7d and octet other than 5d,5e,7e or dd is detected.
For the transmitter if X.86 is enabled the sequence of processing is as follows:
•
Construct frame including start flag, SAPI, Control and MAC frame.
•
Calculate FCS.
•
Perform transparency processing - 7E is translated to 7D5E, 7D is translated to 7D5D.
•
Append the end flag(7E).
•
Scramble the sequence X
43
+1.
Note that the serial transmit and receive registers apply to the X.86 implementations with specific exceptions. The
exceptions are outlined in the serial interface transmit and receive register sections.
