W9864G6JH-6 Block diagram
W9864G2IH
Publication Release Date: Aug. 28, 2009
- 6 -
Revision A03
6. BLOCK DIAGRAM
DQ0
DQ31
DQM0~3
CLK
CKE
A10
CLOCK
BUFFER
COMMAND
DECODER
ADDRESS
BUFFER
REFRESH
COUNTER
COLUMN
COUNTER
CONTROL
SIGNAL
GENERATOR
MODE
REGISTER
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #2
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #0
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #3
DATA CONTROL
CIRCUIT
DQ
BUFFER
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #1
NOTE:
The cell array configuration is 2048 * 256 * 32
ROW
DE
CODE
R
ROW
DE
CODE
R
ROW
DE
CODE
R
ROW
DE
CODE
R
A0
A9
BS0
BS1
CS
RAS
CAS
WE
154
Summary of Contents for NR1605/FB
Page 8: ...Personal notes 8 ...
Page 26: ...Personal notes 26 ...
Page 103: ...CX870 7P 8P 5P PLATE PLATE 2P 7P 4P 7P 11P 5P 8P PLATE S30SC6MT WIRING DIAGRAM 103 ...
Page 140: ...Personal notes Personal notes 140 ...
Page 161: ...2 FL DISPLAY FLD 018BT021GINK FRONT U4400 PIN CONNECTION GRID ASSIGNMENT q T7 161 ...
Page 162: ...ANODE CONNECTION 162 ...