10
P/N: PM1576
MX25L4006E
REV. 1.6, OCT. 24, 2014
HOLD FEATURE
HOLD# pin signal goes low to hold any serial communications with the device. The HOLD feature will not stop the
operation of write status register, programming, or erasing in progress.
The operation of HOLD requires Chip Select (CS#) keeping low and starts on falling edge of HOLD# pin signal
while Serial Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start
until Serial Clock signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Serial
Clock(SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not end until Serial
Clock being low).
Figure 2. Hold Condition Operation
Valid Data
Valid Data
Valid Data
Don’t care
High_Z
High_Z
Don’t care
Bit 7
Bit 6
Bit 5
Bit 5
Bit 7
Bit 7
Bit 6
Bit 6
HOLD#
CS#
SCLK
SI/SIO0
SO/SIO1
(internal)
SO/SIO1
(External)
≈
≈
≈
≈
≈
≈
≈
≈
Valid Data
Valid Data
Valid Data
Don’t care
High_Z
High_Z
Don’t care
Bit 7
Bit 6
Bit 5
Bit 3
Bit 4
Bit 7
Bit 6
Bit 4
Bit 5
Bit 3
HOLD#
CS#
SCLK
SI/SIO0
SO/SIO1
(internal)
SO/SIO1
(External)
≈
≈
≈
≈
≈
≈
≈
≈
Summary of Contents for MX25L4006E
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