36
P/N: PM1576
MX25L4006E
REV. 1.6, OCT. 24, 2014
23
2
1
3 4 5 6 7 8 9 10
28 29 30 31
22 21
3 2 1 0
High-Z
24 BIT ADDRESS
0
32 33 34
36 37 38 39 40 41 42 43 44 45 46
7 6 5 4 3 2
0
1
DATA OUT 1
Dummy Byte
MSB
7 6 5 4 3 2 1 0
DATA OUT 2
MSB
MSB
7
47
7 6 5 4 3 2
0
1
35
SCLK
SI
CS#
SO
SCLK
SI
CS#
SO
0B
Command
Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B)
Figure 17. Dual Output Read Mode Sequence (Command 3B)
High Impedance
2
1
3 4 5 6 7 8
0
SCLK
SI/SO0
SO/SO1
CS#
9 10 11
30 31 32
3B(hex)
dummy
address
bit23, bit22, bit21...bit0
data
bit6, bit4, bit2...bit0, bit6, bit4....
data
bit7, bit5, bit3...bit1, bit7, bit5....
39 40 41 42 43
8 Bit Instruction
24 BIT Address
8 dummy
cycle
Data Output
Summary of Contents for MX25L4006E
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