Implementing MLC NAND Flash for Cost-Effective, High-Capacity Memory
91-SR-014-02-8L
6
Read Disturb Errors
The read disturb effect causes a page read operation to induce a permanent, bit value change in one
of the read bits. In Binary flash technology based on a 0.16
µ
manufacturing process, the typical read
disturb error rate is on the order of 1 bit error per 10
6
repetitive reads of the page containing the bit.
Although MLC cells are more prone to such errors, the effect in actual measurements is less severe
than in program disturb errors. The measured rate is on the order of 1 bit error per approximately 10
5
repetitive reads of the page.
Performance
MLC technology requires more time than Binary flash technology for completing the basic flash
operations of reading a page into the flash buffer, writing a flash buffer into a page, and erasing a
flash unit. Especially for write operations, raw flash comparisons indicate that MLC performance is
only 25 percent that of Binary flash. But many factors other than raw flash speed influence
performance, including: host CPU bus timing issues, error detection and correction, software
algorithms employed by the device driver, file system overhead, patterns of file access by the user,
bus cycles and more.
In fact, from the user’s point of view, raw read or write times are totally irrelevant. What the user
“feels” is how long it takes from when, for example, a long sequence of write commands is issued to
the file system, until the requests are completed. To get a “true” measure of these times, the
measurements should be performed under scenarios that duplicate the real world as closely as
possible. This implies first filling the disk to almost full capacity, and then performing the
measurements, taking into account the hidden mechanisms of the software interfacing the flash to the
user (file system, device driver, etc.).
