17
Rev. B
PIN FUNCTIONS
VOUT0_CFG (E11):
Output Voltage Select Pin for V
OUT0
,
Coarse Setting. If the VOUT0_CFG and VTRIM0_CFG pins
are both left open—or, if the LTM4680 is configured to
ignore pin-strap (RCONFIG) resistors, i.e., MFR_CONFIG_
ALL[6] = 1b—then the LTM4680s target V
OUT0
output
voltage setting (VOUT_COMMAND0) and associated
power-good and OV/UV warning and fault thresholds are
dictated at SV
IN
power-up according to the LTM4680’s
NVM contents. A resistor connected from this pin to
SGND—in combination with resistor pin settings on
VTRIM0_CFG, and using the factory-default NVM setting
of MFR_CONFIG_ALL[6] = 0b—can be used to config-
ure the LTM4680’s channel 0 output to power-up to a
VOUT_COMMAND value (and associated output voltage
monitoring and protection/fault-detection thresholds)
different from those of NVM contents. (See Table 1 in
the Operation section.) Connecting resistor(s) from
VOUT0_CFG to SGND and/or VTRIM0_CFG to SGND in
this manner allows a convenient way to configure mul-
tiple LTM4680s with identical NVM contents for different
output voltage settings all without GUI intervention or
the need to “custom-preprogram” module NVM contents.
Minimize capacitance especially when the pin is left open
to assure accurate detection of the pin state. Note that use
of RCONFIGs on VOUT0_CFG/VTRIM0_CFG can affect the
V
OUT0
range setting (MFR_PWM_MODE0[1]) and loop
gain.
VTRIM1_CFG (E10):
Output Voltage Select Pin for V
OUT1
,
Fine Setting. Works in combination with VOUT1_CFG to
affect the VOUT_COMMAND (and associated output volt-
age monitoring and protection/fault-detection thresholds)
of channel 1, at SV
IN
power-up. (See VOUT1_CFG and
the Operation section.) Minimize capacitance especially
when the pin is left open to assure accurate detection of
the pin state. Note that use of RCONFIGs on VOUT1_CFG/
VTRIM1_CFG can affect the V
OUT1
range setting (MFR_
PWM_MODE1[1]) and loop gain.
VOUT1_CFG (E12):
Output Voltage Select Pin for V
OUT1
,
Coarse Setting. If the VOUT1_CFG and VTRIM1_CFG
pins are both left open or, if the LTM4680 is con-
figured to ignore pin-strap (R
CONFIG
) resistors, i.e.,
MFR_CONFIG_ALL[6] = 1b then the LTM4680’s target
V
OUT1
output voltage setting (VOUT_COMMAND1) and
associated OV/UV warning and fault thresholds are dic-
tated at SV
IN
power-up according to the LTM4680’s NVM
contents, in precisely the same fashion that the VOUT1_
CFG and VTRIM1_CFG pins affect the respective settings
of V
OUT1
/channel 1. (See VOUT1_CFG, VTRIM1_CFG and
the Operation section.) Minimize capacitance—especially
when the pin is left open—to assure accurate detection of
the pin state. Note that use of RCONFIGs on VOUT1_CFG/
VTRIM1_CFG can affect the V
OUT1
range setting (MFR_
PWM_MODE1[1]) and loop gain.
VTRIM0_CFG (C12):
Output Voltage Select Pin for V
OUT0
,
Fine Setting. Works in combination with VOUT0_CFG to
affect the VOUT_COMMAND (and associated output volt-
age monitoring and protection/fault-detection thresholds)
of channel 0, at SV
IN
power-up. (See VOUT0_CFG and
the Operation section.) Minimize capacitance—especially
when the pin is left open—to assure accurate detection of
the pin state. Note that use of RCONFIGs on VOUT0_CFG/
VTRIM0_CFG can affect the V
OUT0
range setting (MFR_
PWM_MODE0[1]) and loop gain.
RUN0, RUN1 (G12, F11 Respectively):
Enable Run Input
for Channels 0 and 1, Respectively. Open-drain input and
output. Logic high on these pins enables the respective
outputs of the LTM4680. These open-drain output pins
hold the pin low until the LTM4680 is out of reset and SV
IN
is detected to exceed V
IN_ON
. A pull-up resistor to 3.3V is
required in the application. The LTM4680 pulls RUN0 and/
or RUN1 low, as appropriate, when a global fault and/or
channel-specific fault occurs whose fault response is
configured to latch off and cease regulation; issuing a
CLEAR_FAULTS command via I
2
C or power-cycling SV
IN
is necessary to restart the module, in such cases. Do not
pull RUN logic high with a low impedance source.
PGOOD0/PGOOD1 (J7/D9):
Power Good Indicator
Outputs. Open-drain logic output that is pulled to ground
when the output exceeds the UV and OV regulation win-
dow. The output is deglitch by an internal 100µs filter. A
pull-up resistor to 3.3V is required in the application.
