Linear ANALOG DEVICES LTM4680, Operation Manual, Page: 123 / 126

LTM4680
123
Rev. B
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PACKAGE DESCRIPTION
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY.
Table 23. LTM4680 BGA Pinout
PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION
A1 SW1 B1 GND C1 GND D1 SV
IN
E1 V
IN1
F1 V
IN1
A2 SW1 B2 SW1 C2 GND D2 GND E2 V
IN1
F2 V
IN1
A3 GND B3 GND C3 GND D3 GND E3 V
IN1
F3 V
IN1
A4 GND B4 GND C4 GND D4 GND E4 V
IN1
F4 V
IN1
A5 GND B5 GND C5 GND D5 GND E5 GND F5 GND
A6 GND B6 GND C6 GND D6 GND E6 GND F6 GND
A7 V
OUT1
B7 V
OUT1
C7 V
OUT1
D7 V
OUT1
E7 INTV
CC
F7 GND
A8 V
OUT1
B8 V
OUT1
C8 V
OUT1
D8 TSNS1b E8 V
DD33
F8 EXTV
CC
A9 V
OUT1
B9 V
OUT1
C9 V
OUT1
D9 PGOOD1 E9 FSWPH_CFG F9 SGND
A10 V
OUT1
B10 V
OUT1
C10 COMP1b D10 COMP1a E10 VTRIM1_CFG F10 SGND
A11 V
OSNS1
+
B11 V
OUT1
C11 WP D11 SHARE_CLK E11 VOUT0_CFG F11 RUN1
A12 V
OSNS1
–
B12 V
OUT1
C12 VTRIM0_CFG D12 V
DD25
E12 VOUT1_CFG F12 ASEL
PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION PIN ID FUNCTION
G1 V
IN0
H1 V
IN0
J1 IN
+
K1 IN
–
L1 GND M1 SW0
G2 V
IN0
H2 V
IN0
J2 GND K2 GND L2 SW0 M2 SW0
G3 V
IN0
H3 V
IN0
J3 GND K3 GND L3 GND M3 GND
G4 V
IN0
H4 V
IN0
J4 GND K4 GND L4 GND M4 GND
G5 GND H5 GND J5 GND K5 GND L5 GND M5 GND
G6 GND H6 GND J6 GND K6 GND L6 GND M6 GND
G7 GND H7 GND J7 PGOOD0 K7 V
OUT0
L7 V
OUT0
M7 V
OUT0
G8 GND H8 GND J8 TSNS0b K8 V
OUT0
L8 V
OUT0
M8 V
OUT0
G9 SGND H9 COMP0b J9 COMP0a K9 V
OUT0
L9 V
OUT0
M9 V
OUT0
G10 SGND H10 SDA J10 TSNS1a K10 V
OUT0
L10 V
OUT0
M10 V
OUT0
G11 FAULT1 H11 ALERT J11 TSNS0a K11 V
OUT0
L11 V
OUT0
M11 V
OSNS0
+
G12 RUN0 H12 FAULT0 J12 SCL K12 SYNC L12 V
OUT0
M12 V
OSNS0
–