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LTC4260

1

4260fc

For more information 

www.linear.com/LTC4260

Typical applicaTion 

FeaTures

DescripTion

Positive High Voltage 

Hot Swap Controller with 

I

2

C Compatible Monitoring

The 

LTC

®

4260

 Hot Swap™ controller allows a board to be 

safely inserted and removed from a live backplane. Using 

an external N-channel pass transistor, the board supply 

voltage can be ramped up at an adjustable rate. An I

2

interface  and  onboard  ADC  allow  monitoring  of  board 

current, voltage and fault status.
The device features adjustable analog foldback current 

limit with latch off or automatic restart after the LTC4260 

remains in current limit beyond an adjustable time-out 

delay.
The controller has additional features to interrupt the host 

when a fault has occurred, notify when output power is 

good,  detect  insertion  of  a  load  card  and  power-up  in 

either the on or off state.

applicaTions

n

  Allows Safe Board Insertion into Live Backplane

n

  8-Bit ADC Monitors Current and Voltage

n

  I

2

C™/SMBus Interface

n

  Wide Operating Voltage Range: 8.5V to 80V

n

  High Side Drive for External N-Channel MOSFET

n

  Input Overvoltage/Undervoltage Protection

n

  Optional Latchoff or Autoretry After Faults

n

  Alerts Host After Faults

n

  Foldback Current Limiting

n

  Available in 24-Lead SO, 24-Lead Narrow 

  SSOP and 32-Lead (5mm 

×

 5mm) QFN Packages

n

  Electronic Circuit Breakers

n

  Live Board Insertion

n

  Computers, Servers

L

, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks 

and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the 

property of their respective owners. 

Power Up Waveforms

3A, 48V Card Resident Application

UV

BACKPLANE PLUG-IN

CARD

2.67k

*

1.74k

49.9k

48V

SDA

SCL

ALERT

GND

V

DD

SENSE

LTC4260

INTV

CC

100k

FDB3632

0.010Ω

10Ω

6.8nF

C

L

43.5k

3.57k

V

OUT

48V

24k

68nF

*DIODES INC. SMBT70A

0.1µF

0.1µF

GATE

TIMER

GND

FB

BD_PRST

ADIN

GPIO

4260 TA01

SOURCE

OV
SDAO
SDAI
SCL

ALERT

ON

CONNECTOR 1

CONNECTOR 2

+

V

IN

50V/DIV

V

OUT

50V/DIV

GPIO

5V/DIV

25ms/DIV

4260 TA02

I

IN

2A/DIV

C

L

 = 1000F

Summary of Contents for LTC4260

Page 1: ...o Live Backplane n 8 Bit ADC Monitors Current and Voltage n I2C SMBus Interface n Wide Operating Voltage Range 8 5V to 80V n High Side Drive for External N Channel MOSFET n Input Overvoltage Undervolt...

Page 2: ...age Temperature Range GN SW Packages 65 C to 150 C UH Package 65 C to 125 C Lead Temperature Soldering 10 sec GN SW Packages Only 300 C Supply Voltages VDD 0 3V to 100V Input Voltages SENSE VDD 10V or...

Page 3: ...resis l 70 90 120 mV IOV IN OV Pin Input Current VOV 3 5V l 0 1 A VUV TH UV Pin Threshold Voltage VUV Rising l 3 43 3 5 3 56 V VUV HYST UV Pin Hysteresis l 310 380 440 mV IUV IN UV Pin Input Current V...

Page 4: ...0 5 3 s tPHL SENSE VDD SENSE High to GATE Low VDD SENSE 200mV CGATE 10nF l 0 4 1 s ADC Resolution No Missing Codes Note 4 l 8 Bits Integral Nonlinearity VDD SENSE Note 5 SOURCE ADIN l l l 0 5 0 5 0 5...

Page 5: ...Maximum Ratings may cause permanent damage to the device Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime Note 2 All currents into devi...

Page 6: ...75 100 TEMPERATURE C 50 0 34 UV HYSTERESIS V 0 35 0 36 0 37 0 38 0 39 25 0 25 50 4260 G03 75 100 TEMPERATURE C 50 1 220 ON BD_PRST LOW HIGH THRESHOLD V 1 225 1 230 1 235 1 240 1 245 25 0 25 50 4260 G0...

Page 7: ...75 100 IGATE A 0 GATE DRIVE V GATE V SOURCE V 8 10 12 20 4260 G10 6 4 0 5 10 15 2 16 14 VDD 80V VDD 48V VDD 12V VDD V 5 GATE DRIVE V GATE V SOURCE V 12 14 16 20 30 4260 G11 10 8 10 15 25 35 85 C 25 C...

Page 8: ...turn on rate and compensates the active current limit During turn off there is a 1mA pull down current During a short circuit or undervoltage lockout VDD or INTVCC a 600mA pull down current source be...

Page 9: ...n also serves as the ADC input to monitor output voltage The pin provides a return for the gate pull down circuit and as a supply for the charge pump circuit TIMER TimerInput Connectacapacitorbetweent...

Page 10: ...V 2V PWRGD FET ON PG RST BP BOARD PRESENT 1 235V 0 2V LOGIC TM2 UVLO2 ON UVLO1 FB OV GN UH ONLY BD_PRST ON 10 A SDAI SDAO SCL ALERT ADR0 ADR1 ADR2 GND UH ONLY EXPOSED PAD VDD ADIN 1 OF 27 8 3 8V VCC U...

Page 11: ...erheating At this point the TIMER pin ramps down us ing the 2 A current source until the voltage drops below tSU DAT tSU STO tSU STA tBUF tHD STA tSP tSP tHD DATO tHD DATI tHD STA START CONDITION STOP...

Page 12: ...ol registers are set or cleared as described in the register section After the power on reset pulse the LTC4260 will go through the following turn on sequence First the UV and OV pins must indicate th...

Page 13: ...nst excessive power dissipation in theswitchduringactivecurrentlimit theavailablecurrent is reduced as a function of the output voltage sensed by the FB pin The device also features a variable overcur...

Page 14: ...f UV is below its 3 12VthresholdafterINTVCCcrossesits4 5Vundervoltage lockout threshold an undervoltage fault will be logged in the fault register Board Present Change of State Whenever the BD PRST pi...

Page 15: ...s means repeated or continuing faults will not generate alerts until the associated FAULT register bit has been cleared Resetting Faults Faults are reset with any of the following conditions First a s...

Page 16: ...H there is a chance that the supply could collapse before the active current limit circuit brings down the GATE pin In this case the undervoltage monitors turn off the pass FET The undervoltage lockou...

Page 17: ...R2 R3 R7 and R8 for the UV OV and PG threshold voltages VOVRISING 71 2V VOVFALLING 69 44V using VOV TH 3 5V rising and 3 41V falling VUVRISING 43V VUVFALLING 38 5V using VUV TH 3 5V rising and 3 12V...

Page 18: ...e SMBus Alert Response Protocol Applications Information Acknowledge The acknowledge signal is used for handshaking between thetransmitterandthereceivertoindicatethatthelastbyte of data was received T...

Page 19: ...begins by sending a START bit followed by the special Alert Response Address 0001 100 b with the R W bit set to one Any LTC4260 that is pulling its ALERT pin low will acknowledge and begin sending ba...

Page 20: ...SLAVE TO MASTER A ACKNOWLEDGE LOW A NOT ACKNOWLEDGE HIGH R READ BIT HIGH W WRITE BIT LOW S START CONDITION P STOP CONDITION COMMAND DATA X X X X X b2 b0 0 W 0 0 0 b7 b0 A A A P S ADDRESS 1 0 a4 a0 COM...

Page 21: ...X L L L 5 8A 1 0 0 0 1 0 1 X L H H 6 8C 1 0 0 0 1 1 0 X L L NC 7 8E 1 0 0 0 1 1 1 X L L H 8 90 1 0 0 1 0 0 0 X NC NC L 9 92 1 0 0 1 0 0 1 X NC H NC 10 94 1 0 0 1 0 1 0 X NC NC NC 11 96 1 0 0 1 0 1 1...

Page 22: ...A7 6 GPIO Configure Configures Behavior of GPIO Pin FUNCTION A6 A7 GPIO PIN Power Good Default 0 0 GPIO C3 Power Bad 0 1 GPIO C3 General Purpose Output 1 0 GPIO B6 General Purpose Input 1 1 GPIO Hi Z...

Page 23: ...tage Condition 1 Enable Alert 0 Disable Alert Default B0 Overvoltage Alert Enables Alert for Overvoltage Condition 1 Enable Alert 0 Disable Alert Default Table 5 STATUS Register C 02h Read Only BIT NA...

Page 24: ...was High and Gate was High or Low D2 Overcurrent Fault Occurred Indicates Overcurrent Fault Occurred 1 Overcurrent Fault Occurred 0 No Overcurrent Faults D1 Undervoltage Fault Occurred Indicates Input...

Page 25: ...I SCL ALERT ON Figure 12 12A 12V Card Resident Application Figure 13 3A 48V Card Resident Application 16 6 17 UV BACKPLANE PLUG IN CARD R3 2 67k 1 R2 1 74k 1 4 5 9 10 8 7 2 1 24 23 18 13 20 14 12 19 1...

Page 26: ...0 25 0532 0688 1 35 1 75 008 012 0 203 0 305 TYP 004 0098 0 102 0 249 0250 0 635 BSC 033 0 838 REF 254 MIN RECOMMENDED SOLDER PAD LAYOUT 150 165 0250 BSC 0165 0015 045 005 DIMENSION DOES NOT INCLUDE M...

Page 27: ...004 012 0 102 0 305 093 104 2 362 2 642 050 1 270 BSC 014 019 0 356 0 482 TYP 0 8 TYP NOTE 3 009 013 0 229 0 330 016 050 0 406 1 270 291 299 7 391 7 595 NOTE 4 45 010 029 0 254 0 737 420 MIN 325 005...

Page 28: ...LL NOT EXCEED 0 20mm ON ANY SIDE 5 EXPOSED PAD SHALL BE SOLDER PLATED 6 SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK NOTE 6 0 40 0 10 31 1 2 32 BO...

Page 29: ...TE DESCRIPTION PAGE NUMBER B 1 12 Revised Conditions and Min value for IGATE FST Corrected typographical error in Layout Considerations section 3 17 C 5 13 Removed erroneous temperature dot from VGPIO...

Page 30: ...TC4252 48V Hot Swap Controller in MSOP Fast Active Current Limiting with Drain Accelerated Response Supplies from 15V LT4256 Positive 48V Hot Swap Controller with Open Circuit Detect Foldback Current...

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