LTC3810-5
21
38105fd
V
IN
is typically much higher than 14V a separate supply
for the IC power (INTV
CC
) and driver power (DRV
CC
) must
be used. The LTC3810-5 has integrated bias supply con-
trol circuitry that allows the IC/driver supply to be easily
generated from V
IN
and/or V
OUT
with minimal external
components. There are four ways to do this as shown in
the simplified schematics of Figure 3 and explained in the
following sections.
Using the Linear Regulator for INTV
CC
/DRV
CC
Supply
In Mode 1, a small external SOT23 MOSFET, controlled
by the NDRV pin, is used to generate a 5.5V start-up
supply from V
IN
. The small SOT23 package can be used
because the NMOS is on continuously only during the brief
start-up period. As soon as the output voltage reaches
4.7V, the LTC3810-5 turns off the external NMOS and the
LTC3810-5 regulates the 5.5V supply from the EXTV
CC
pin (connected to V
OUT
or a V
OUT
derived boost network)
through an internal low dropout regulator. For this mode to
work properly, EXTV
CC
must be in the range 4.7V < EXTV
CC
< 15V. If V
OUT
< 4.7V, a charge pump or extra winding can
be used to raise EXTV
CC
to the proper voltage, or alter-
natively, Mode 2 should be used as explained later in this
section. If V
OUT
is shorted or otherwise goes below the
minimum 4.5V threshold, the MOSFET connected to V
IN
is turned back on to maintain the 5.5V supply. However if
the output cannot be brought up within a timeout period,
the drivers are turned off to prevent the SOT23 MOSFET
from overheating. Soft-start cycles are then attempted at
low duty cycle intervals to try to bring the output back up
(see Figure 10). This fault timeout operation is enabled
by choosing the choosing R
NDRV
such that the resistor
current I
NDRV
is greater than 270µA by using the follow-
ing formulas:
R
NDRV
≤
P
MOSFET(MAX)
/I
CC
−
V
TH
270
µ
A
where
I
CC
=
(f) Q
G(TOP)
+
Q
G(BOTTOM)
(
)
+
3mA
and V
TH
is the threshold voltage of the MOSFET.
The value of R
NDRV
also affects the V
IN(MIN)
as follows:
V
IN(MIN)
= V
INTVCC(MIN)
+ (40µA) R
NDRV
+V
T
(1)
where V
INTVCC(MIN)
is normally 4.5V for driving logic-level
MOSFETs. If minimum V
IN
is not low enough, consider
reducing R
NDRV
and/or using a Darlington NPN instead
of an NMOS to reduce V
T
to ~1.4V.
When using R
NDRV
equal to the computed value, the
LTC3810-5 will enable the low duty cycle soft-start re-
tries only when the desired maximum power dissipation,
P
MOSFET(MAX)
, in the MOSFET is exceeded and leave the
drivers on continuously otherwise. The shutoff/restart
times are a function of the TRACK/SS capacitor value.
The external NMOS for the linear regulator should be a
standard 3V threshold type (i.e., not a logic-level threshold).
The rate of charge of INTV
CC
from 0V to 5.5V is controlled
by the LTC3810-5 to be approximately 75µs regardless
of the size of the capacitor connected to the INTV
CC
pin.
The charging current for this capacitor is approximately:
I
C
=
5.5V
75
µ
s
⎛
⎝⎜
⎞
⎠⎟
C
INTVCC
Figure 10. Fault Timeout Operation
SS/TRACK
V
OUT
TG/BG
FAULT TIMEOUT
ENABLED
EXTV
CC
UV THRESHOLD
DRIVER OFF THRESHOLD
DRIVER POWER
FROM V
IN
SHORT-CIRCUIT EVENT
START-UP INTO SHORT-CIRCUIT
START-UP
DRIVER POWER
FROM V
OUT
DRIVER POWER
FROM V
IN
I
SS/TRACK
= 1.4
µ
A (SOURCE)
I
SS/TRACK
= 0.1
µ
A (SINK)
38105 F10
applicaTions inForMaTion
