LTC3558
22
3558f
APPLICATIONS INFORMATION
switch. During each cycle, a current comparator compares
the peak inductor current to the output of an error amplifi er.
The output of the current comparator resets the internal
latch, which causes the main P-channel MOSFET switch to
turn off and the N-channel MOSFET synchronous rectifi er
to turn on. The N-channel MOSFET synchronous rectifi er
turns off at the end of the 2.25MHz cycle or if the current
through the N-channel MOSFET synchronous rectifi er
drops to zero. Using this method of operation, the error
amplifi er adjusts the peak inductor current to deliver the
required output power. All necessary compensation is
internal to the buck switching regulator requiring only a
single ceramic output capacitor for stability. At light loads
in pulse skip mode, the inductor current may reach zero
on each pulse which will turn off the N-channel MOSFET
synchronous rectifi er. In this case, the switch node (SW1)
goes high impedance and the switch node voltage will
“ring”. This is discontinuous operation, and is normal be-
havior for a switching regulator. At very light loads in pulse
skip mode, the buck switching regulator will automatically
skip pulses as needed to maintain output regulation. At
high duty cycle (V
OUT
> PV
IN1
/2) in pulse skip mode, it is
possible for the inductor current to reverse causing the
buck converter to switch continuously. Regulation and
low noise operation are maintained but the input supply
current will increase to a couple mA due to the continuous
gate switching.
During Burst Mode operation, the buck switching regula-
tor automatically switches between fi xed frequency PWM
operation and hysteretic control as a function of the load
current. At light loads the buck switching regulator controls
the inductor current directly and use a hysteretic control
loop to minimize both noise and switching losses. During
Burst Mode operation, the output capacitor is charged to a
voltage slightly higher than the regulation point. The buck
switching regulator then goes into sleep mode, during
which the output capacitor provides the load current. In
sleep mode, most of the switching regulator’s circuitry is
powered down, helping conserve battery power. When
the output voltage drops below a pre-determined value,
the buck switching regulator circuitry is powered on and
another burst cycle begins. The sleep time decreases as the
load current increases. Beyond a certain load current point
(about 1/4 rated output load current) the buck switching
regulator will switch to a low noise constant-frequency
PWM mode of operation, much the same as pulse skip
operation at high loads. For applications that can tolerate
some output ripple at low output currents, Burst Mode
operation provides better effi ciency than pulse skip at
light loads.
The buck switching regulator allows mode transition on-
the-fl y, providing seamless transition between modes even
under load. This allows the user to switch back and forth
between modes to reduce output ripple or increase low
current effi ciency as needed. Burst Mode operation is set
by driving the MODE pin high, while pulse skip mode is
achieved by driving the MODE pin low.
Buck Switching Regulator in Shutdown
The buck switching regulator is in shutdown when not
enabled for operation. In shutdown, all circuitry in the buck
switching regulator is disconnected from the regulator input
supply, leaving only a few nanoamps of leakage pulled to
ground through a 13k resistor on the switch (SW1) pin
when in shutdown.
Buck Switching Regulator Dropout Operation
It is possible for the buck switching regulator’s input volt-
age to approach its programmed output voltage (e.g., a
battery voltage of 3.4V with a programmed output voltage
of 3.3V). When this happens, the PMOS switch duty cycle
increases until it is turned on continuously at 100%. In this
dropout condition, the respective output voltage equals the
regulator’s input voltage minus the voltage drops across
the internal P-channel MOSFET and the inductor.
