LTC3558
25
3558f
Buck-Boost Switching Regulator
The LTC3558 contains a 2.25MHz constant-frequency,
voltage mode, buck-boost switching regulator. The regu-
lator provides up to 400mA of output load current. The
buck-boost switching regulator can be programmed for a
minimum output voltage of 2.75V and can be used to power
a microcontroller core, microcontroller I/O, memory, disk
drive, or other logic circuitry. To suit a variety of applica-
tions, different mode functions allow the user to trade off
noise for effi ciency. Two modes are available to control the
operation of the buck-boost regulator. At moderate to heavy
loads, the constant-frequency PWM mode provides the
least noise switching solution. At lighter loads, Burst Mode
operation may be selected. Regulation is maintained by an
error amplifi er that compares the divided output voltage
with a reference and adjusts the compensation voltage
accordingly until the FB2 voltage has stabilized at 0.8V. The
buck-boost switching regulator also includes soft-start to
limit inrush current and voltage overshoot when powering
on, short-circuit current protection, and switch node slew
limiting circuitry for reduced radiated EMI.
Buck-Boost Regulator PWM Operating Mode
In PWM mode, the voltage seen at the feedback node is
compared to a 0.8V reference. From the feedback voltage,
an error amplifi er generates an error signal seen at the
V
C2
pin. This error signal controls PWM waveforms that
modulate switches A (input PMOS), B (input NMOS), C
(output NMOS), and D (output PMOS). Switches A and
B operate synchronously, as do switches C and D. If the
input voltage is signifi cantly greater than the programmed
output voltage, then the regulator will operate in buck
mode. In this case, switches A and B will be modulated,
with switch D always on (and switch C always off), to step-
down the input voltage to the programmed output. If the
input voltage is signifi cantly less than the programmed
output voltage, then the converter will operate in boost
mode. In this case, switches C and D are modulated, with
switch A always on (and switch B always off), to step up
the input voltage to the programmed output. If the input
voltage is close to the programmed output voltage, then
the converter will operate in four-switch mode. While
operating in four-switch mode, switches turn on as per
the following sequence: switches A and D
→
switches A
and C
→
switches B and D
→
switches A and D.
Buck-Boost Regulator Burst Mode Operation
In Burst Mode operation, the switching regulator uses a
hysteretic feedback voltage algorithm to control the output
voltage. By limiting FET switching and using a hysteretic
control loop switching losses are greatly reduced. In
this mode, output current is limited to 50mA. While in
Burst Mode operation, the output capacitor is charged
to a voltage slightly higher than the regulation point. The
buck-boost converter then goes into a SLEEP state, dur-
ing which the output capacitor provides the load current.
The output capacitor is charged by charging the inductor
until the input current reaches 250mA typical, and then
discharging the inductor until the reverse current reaches
0mA typical. This process of bursting current is repeated
until the feedback voltage has charged to the reference
voltage plus 6mV (806mV typical). In the SLEEP state,
most of the regulator’s circuitry is powered down, helping
to conserve battery power. When the feedback voltage
drops below the reference voltage minus 6mV (794mV
typical), the switching regulator circuitry is powered on
and another burst cycle begins. The duration for which the
regulator operates in SLEEP depends on the load current
and output capacitor value. The SLEEP time decreases
as the load current increases. The maximum deliverable
load current in Burst Mode operation is 50mA typical.
The buck-boost regulator may not enter SLEEP if the load
current is greater than 50mA. If the load current increases
beyond this point while in Burst Mode operation, the out-
put may lose regulation. Burst Mode operation provides a
signifi cant improvement in effi ciency at light loads at the
expense of higher output ripple when compared to PWM
mode. For many noise-sensitive systems, Burst Mode
operation might be undesirable at certain times (i.e., dur-
ing a transmit or receive cycle of a wireless device), but
highly desirable at others (i.e., when the device is in low
power standby mode).
APPLICATIONS INFORMATION
