A Used counter (5-8D) is provided to help keep track of how many SRCs are in use and how many are
available.
The Configuration switch (5-8E) allows the SRCs to distributed in one of two ways: 20 can be made
available for Input and 16 for Output, or all 36 can be reserved for only the Input.
Figure 5-8 - Sample rate converters
Clock Reference
Because the UPMAX ISC supports multiple input and output formats, having a firm grasp of the clock sync
(reference) requirements is critical.
Clock Reference Requirements
Sample Rate Converters (SRCs) are provided on both SDI inputs, the SDI 1 output, and the AES-3 input.
The AES-3 output is always synced to the active reference clock. There are no SRCs in the AES67 path.
Reference clock source options include:
Internal 48kHz
SDI Input
AES-3 Input
MADI Input (when optional MADI card is present)
PTP (AES67)
When all input sources are SDI and the output of the processor is routed to the embedded SDI output, the
reference signal present on the SDI input must be used.
