Lime Microsystems EVB7, Quick Start Manual

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LMS7002M Quick Starter Manual for EVB7 kit
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Version: 2.2 Last modified: 29/09/2014
14
SyntCLK2
Clock Out, CMOS.
15 VDIO +3.3V supply
16 TXIQSEL IQ flag in RXTXIQ mode enable flag in JESD207 mode, Port 1
17 TXMCLK Clock from RFIC to BBIC during JESD207 mode, Port 1
18
TXEN
TX hard power off
19 GND GND
20 GND GND
21
RXD0
DIQ bus, bit 0, Port 2
22 RXD1 DIQ bus, bit 1, Port 2
23 RXD2 DIQ bus, bit 2, Port 2
24 RXD3 DIQ bus, bit 3, Port 2
25
RXD4
DIQ bus, bit 4, Port 2
26 RXD5 DIQ bus, bit 5, Port 2
27 RXD6 DIQ bus, bit 6, Port 2
28
RXD7
DIQ bus, bit 7, Port 2
29
RXD8
DIQ bus, bit 8, Port 2
30 RXD9 DIQ bus, bit 9, Port 2
31 RXD10 DIQ bus, bit 10, Port 2
32
RXD11
DIQ bus, bit 11, Port 2
33
TXNRX1
LimeLight protocol control
34 SynCLK1 Clock Out, CMOS
35 RXFCLK Clock from BBIC to RFIC during JESD207 mode, Port 2
36
RXIQSEL
IQ flag in RXTXIQ mode enable flag in JESD207 mode, Port 2
37 RXMCLK Clock from RFIC to BBIC during JESD207 mode, Port 2
38 RXEN RX hard power off
39 TXNRX2 LimeLight protocol control
40 SAEN Serial port A enable, active low, CMOS
41 SCLK Serial port clock, positive edge sensitive, CMOS
42 SDIO Serial port data in/out, CMOS
43
SDO
Serial port data out, CMOS
44 RESET Hardware reset, active low, CMOS
Hardware options 6.3
This section describes the configuration options and set up procedures for:

TCXO’s and data clocks distribution

EVB7 Synchronization

SPI connection options
The board is shipped with the default mode which means a basic operation using an external
digital I/O source via the FMC connector. Various configurations are available depending on the