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LGE Internal Use Only
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
3.1.9 USB
The USB block supports the implementation of a “High-speed" device fully compliant to USB
2.0 standard. It provides an interface between the CPU (embedded local host) and the USB
wire, and handles USB transactions with minimal CPU intervention.
The USB specification allows up to 15 pairs of endpoints. Data for each endpoint is buffered
in RAM within the USB block and is read/written from the endpoint FIFO using DMA
transfers or FIFO register access. High-speed (high throughput) endpoints can use DMA
while slower endpoints can use FIFO register access.
The USB block can request up to six DMA channels, three for IN endpoints and three for
OUT endpoints.
Table 3-1-6. USB Signal Interface of DB3200
USB data7
USB_DAT7
USB chip select
USB_CS_PD
USB data0
USB_DAT0
USB data1
USB_DAT1
USB data2
USB_DAT2
USB data3
USB_DAT3
USB data4
USB_DAT4
USB data5
USB_DAT5
USB data6
USB_DAT6
ULPI stop signal
USB_STP
ULPI direction signal
USB_DIR
USB clock
USB_CLK
ULPI next signal
USB_NXT
Power supply for DB3200 USB block
VBUS
Note
USB Function