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LGE Internal Use Only
Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
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The K511H12ACM is a Multi Chip Package Memory which combines 1Gbit NAND Flash Memory and 512Mbit
SDR synchronous high data rate Dynamic RAM. NAND cell provides the most cost-effective solution for the
solid state application market. A program operation can be performed in typical 250μs(TBD) on the
(1K+32)Word page and an erase operation can be performed in typical 2ms on a (64K+2K)Word block. Data
in the data register can be read out at 42ns cycle time per Word. The I/O pins serve as the ports for address
and data input/output as well as command input. The on-chip write controller auto-mates all program and
erase functions including pulse repetition, where required, and internal verification and margining of data.
Even the write-intensive systems can take advantage of the device
ƍ
s extended reliability of 100K
program/erase cycles by providing ECC(Error Correcting Code) with real time mapping-out algorithm. The
device is an optimum solution for large nonvolatile storage applications such as solid state file storage and
other portable applications requiring non-volatility.
In 512Mb Mobile SDR SDRAM is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x
8,388,608 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technology. Synchronous
design allows precise cycle control with the use of system clock and I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable burst lengths and programmable latencies allow
the same device to be useful for a variety of high bandwidth and high performance memory system
applications.
The K511H12ACM is suitable for use in data memory of mobile communication system to reduce not only
mount area but also power consumption. This device is available in 107-ball FBGA Type.
<Common>
• Operating Temperature : -25°C ~ 85°C
• Package : 107ball FBGA Type - 10.5x13x1.2mmt, 0.8mm pitch
<NAND Flash>
• Voltage Supply : 1.7V ~ 1.95V
• Organization
- Memory Cell Array :
(64M + 2M) x 16bit for 1Gb
- Data Register : (1K + 32) x 16bit
• Automatic Program and Erase
- Page Program : (1K + 32)Word
- Block Erase : (64K + 2K)Word
• Page Read Operation
- Page Size : (1K + 32)Word
- Random Read : 40μs(Max. TBD)
- Serial Access : 42ns(Min. TBD)
• Fast Write Cycle Time
- Page Program time : 250μs(Typ. TBD)
