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LGE Internal Use Only
Copyright © 2010 LG Electronics. Inc. All right reserved.
Only for training and service purposes
3. TECHNICAL BRIEF
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3.4.3 RF Interface (T_OUT)
Ball
13X13
Name
Power
Domain
Dir
Description
RF Parallel Control Unit
AE6
BPI_BUS0
VDD33
IO
RF hard-wire control bus 0
AD7
BPI_BUS1
VDD33
IO
RF hard-wire control bus 1
AC7
BPI_BUS2
VDD33
IO
RF hard-wire control bus 2
AC6
BPI_BUS3
VDD33
IO
RF hard-wire control bus 3
AE8
BPI_BUS4
VDD33
IO
RF hard-wire control bus 4
AD8
BPI_BUS5
VDD33
IO
RF hard-wire control bus 5
AC8
BPI_BUS6
VDD33
IO
RF hard-wire control bus 6
AB8
BPI_BUS7
VDD33
IO
RF hard-wire control bus 7
AE9
BPI_BUS8
VDD33
IO
RF hard-wire control bus 8
AD9
BPI_BUS9
VDD33
IO
RF hard-wire control bus 9
RF Serial Control Unit
AC9
BSI_CS0
VDD33
IO
RF 3-wire interface chip select 0
AE10
BSI_DATA
VDD33
IO
RF 3-wire interface data output
AD10
BSI_CLK
VDD33
IO
RF 3-wire interface clock output
3.4.4 ADC Channel
Ball
Name
Dir
Description
Function
T4
AUXADIN0
I
Auxiliary ADC input 0
External ADC Channel
U2
AUXADIN1
I
Auxiliary ADC input 1
External ADC Channel
U4
AUXADIN2
I
Auxiliary ADC input 2
External ADC Channel
V2
AUXADIN3
I
Auxiliary ADC input 3
External ADC Channel
(internal)
-
-
Auxiliary ADC_4
ISENSE(Fix)
(internal)
-
-
Auxiliary ADC_5
BATSENSE(Fix)
(internal)
-
-
Auxiliary ADC_6
CHRIN(Fix)