6. BLOCK DIAGRAM
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Only for training and service purposes
LGE Internal Use Only
PACT
30
LGE Internal Use Only
4-2. Memory – XMM6260, USIM, MCP Block Diagram
MEM_RAS_N
MEM_WR_N
/CS
CKE
WED_
MEM_WR_N
UDQM
LDQS
DQ0:15
USIM_CLK
USIM_RESET/
USIM_DATA
MICRO SD
MICROSD_CLK
MICROSD_DAT0:3
MICROSD_CMD
MICROSD_DET/
SDMMC4_DAT[0:7]
1Gb NAND
+
256Mb DDR
(HYNIX)
SDMMC4_CLK
SDMMC4_CMD
SDMMC3_CLK
SDMMC3_CMD
GPIO_V03
SDMMC3_DATA
SDMMC4_DAT0
SDMMC4_CLK
SDMMC4_CMD
MEM_AD[0:12]
MEM_AD[0:15]
MEM_CS0_N
MEM_RD_N
MEM_WP
MEM_WR_N
MEM_ADV_N
MEM_WAIT_N
MEM_BUSY/
MEM_A[0:15]
MEM_BC0_N
MEM_BC1_N
DDR_DQS[0]
DDR_DQS[1]
MEM_AD[14]
MEM_AD[15]
DDR_CAS_N
MEM_CS1_N
DDR_RAS_N
MEM_BFCLK0_1
DDR_CKE
DDR_CLK
AP30
XMM6260
MEM_AD_0:15
MEM_CS0_N
MEM_RD_N
FWP
MEM_WR_N
MEM_ADV_N
MEM_WAIT_N
FCDP_RBn
IO0:15
/CE
/RE
/WP
/WE
ALE
CLE
R/B
USIM
CC_CLK
CC_RST
CC_IO
MEM_AD_0:12
MEM_A_0:15
MEM_BC0_N
MEM_BC1_N
MEM_BC2_N
MEM_BC3_N
MEM_AD_14
MEM_AD_15
MEM_CAS_N
MEM_CS1_N
MEM_BFCLKO_1
MEM_CKE
MEM_SDCLKO
A0:12
LDQM
UDQS
BA0
BA1
/CAS
/RAS
/CK
CK
8GB eMMC
+
16Gb LPDDR
(SAMSUNG)
DDR_A[0:9]
DDR_DQ[0:31]
CA[0:9]
DQ[0:31]
DDR_A[0:9]
DDR_DQ[0:31]
DDR_CLK
DDR_CLK
CLK
Memory – XMM6260, USIM, MCP Block Diagram