LG GCE-8240B Service Manual Download Page 36

Page: 36 / 72

Pin Name

Pin #

Type

Description

UA15
UA14
UA13
UA12
UA11
UA10

UA9
UA8

116
117
118
119
120
121
122
123

System Controller Address 15 8 Bus:

This bus is the upper 8-bits of the 16-

bit system controller address. In register access mode (UCS0# asserted),
UA15

are not decoded.

UA7
UA6
UA5
UA4
UA3
UA2
UA1
UA0

124
125
126
127
128
129
130
131

System Controller Address 7 0 Bus:

This bus is the lower 8-bits of the 16-

bit system controller address when non-multiplexed mode is enabled (see
UALE description). In Non-Multiplexed Mode, U

ust be grounded.

UAD7
UAD6
UAD5
UAD4
UAD3
UAD2
UAD1
UAD0

104
103
102
101
100

99
98
97

I/O

System Controller Address 7 0/Data Bus:

This bi-directional bus transfers

8-bit data. When multiplexed mode is enabled (see UALE description),
UAD7 0 also functions as the lower 8-bits of the system controller address
bus. UAD7 0 is high-impedance when not used to transfer data or
addresses.

URD# /
UR/W#

105

Microcontroller Read Strobe:

In X86 Mode, URD# is the read data strobe.

Read or Write Status:

In Motorola Mode, UR/W# high indicates that a read

is occurring when UDS# is asserted. UR/W# low indicates that a write is
occurring when UDS# is asserted.

UWR# /

UDS#

106

Microcontroller Write Strobe:

In X86 Mode, UWR# is the write data

strobe.

Data Strobe:

In Motorola Mode, UDS# is the data strobe. Signal UR/W#

determines whether a read or write is occurring when UDS# is asserted.

SYSTEM CONTROLLER INTERFACE

Summary of Contents for GCE-8240B

Page 1: ...n and real time layered error correction at each speed 6 PIO Mode 4 Multi DMA Mode 2 7 Multimedia MPC 3 Spec compliant 8 Support CD TEXT read write 5 Audio 1 Output 16 bit digital data over ATA interface 2 8 Times Digital Filter for CD Audio 3 Software Volume Control 4 Equipped with audio line output and headphone jack for audio CD playback 5 Front panel Volume Control for Headphone Output This se...

Page 2: ...ombined Video CD CD I FMV CD Plus CD Extra Writing Method Disc at once DAO Session at once SAO Track at once TAO Variable packet writing Fixed packet writing Multi session 4 Cache memory R W 8 Mbyte 5 Disc diameter 12 cm 8 cm 6 Data capacity Yellow Book User Data Block 2 048 bytes block Mode 1 Mode 2 Form 1 2 336 bytes block Mode 2 2 328 bytes block Mode 2 Form 2 2 352 bytes block CD DA 7 Rotation...

Page 3: ...th 5 tolerance less than 100 mVp p Ripple voltage 2 Current Hold Track State 5V DC 1 4A 12V DC 0 5A Typical Seeking Spin up 5V DC 1 4A 12V DC 0 9A Typical 6 AUDIO PERFORMANCE GCE 8240B FUNCTION TABLE Item Typical Limit Test Signal Test Condition Note OutputLevel 0 7 Vrms 10 1KHz 0 dB No Filter at 47 kΩ S N 85 dB 75 dB 1KHz 0 dB with IHF A 20KHz LPF at 47kΩ THD 0 08 0 1 1KHz 0 dB with IHF A 20KHz L...

Page 4: ...en there is no power 4 Volume control This is used to adjust the output volume of the headphone jack It can t be used to adjust the output volume for the audio output connectors on the rear panel NOTE Turn the volume down before turning on the power Sudden loud noises can damage your hearing 5 Headphone jack This jack is for connecting headphones or mini speakers 6 Drive activity indicators Two co...

Page 5: ...on as this could cause a short circuit and damage the system Always turn the power OFF when connecting or disconnecting the cable 3 Jumper Connector This jumper determines whether the drive is configured as a master or slave Changing the master slave configuration takes effect after power on reset 4 Analog Audio Output Connector Provides output to a sound card analog signal Generally you need this...

Page 6: ... Circuit Board A Remove the Cabinet in the direction of arrow 4 See Fig 1 3 B Release 2 hooks a and remove the CD Tray drawing forward C Remove the Main Circuit Board in the direction of arrow 5 D At this time be careful not to damage the 4 connectors are positioned at right side of the Main Circuit Board 2 MECHANISM ASSY DISASSEMBLY 2 1 Pick up Unit A Release screws B B Separate the Pick up Unit ...

Page 7: ...2 2 Pick up A Release 2 screws C and remove the Pick up Pick up Unit Pick up C C Fig 2 2 9 ...

Page 8: ...hanged conditions of disc and change in operating temperature Jitter The 16 value of the time variation between leading and trailing edges of a specific I3 I11 pit or land as measured by Time Interval Analysis Deviation The difference between a fixed value of Pit length and Land length TOC Table Of Contents in the Lead in Area the subcode Q channel contains information about the Tracks on the disc...

Page 9: ...Land Track pitch p Radial Direction Iw A O a a Groove Land Radial Error Signal The Groove wobble Average center Actual center CD ROM CD R CD RW Standard Yellow Book Orange Book II Orange Book III Record Not available Write once Re writable I 11 Itop 0 6 0 6 0 55 M11 0 70 HF Modulation Write Laser Power mW 10 30 mW 6 25 mW Read Laser Power mW 0 5 mW 0 7 mW 1 0 mW Jitter 35 nsec 35 nsec 35 nsec Refl...

Page 10: ...n the disc It is so called WORM Write Once Read Many CD It is composed of polycarbonate layer Organic dye layer Reflective layer and Protective layer Gold Silver Reflective layer is used to enhance the reflectivity According to the kinds of Organic dye layer it is divided by Green CD Gold CD Blue CD Laser Wavelength 780 nm Laser Power read 1 2 mW Recording Power 8x 9 30mW 12x 12 38mW 16x 14 44mW 2...

Page 11: ... reading is enabled by the difference of reflectivity It is possible to overwrite about 1000 times Laser Wavelength 780 nm Laser Power Read 1 0mW Recording Power Erase 4 18mW Write 15 40mW When disc rewriting new data is overwritten previously recorded data Polycarbonate layer has a Pre Groove which make a track Lens H D Beam Spot Focusing Lens Laser Spot at Constant Read Intensity Reflected Light...

Page 12: ...Spot Recorded Mark Reflected Light Signal Reflected Light Signal Below ORP Mark Too Short At Optimum Record Power ORP Above ORP Mark Too Long Time 6 Writing process of CD RW Disc Write Power Erase Power Read Power Groove Crystal Amorphous Amorphous Recorded state lower reflectivity Melting quenching Heating gradual cooling Crystal phase Erased state higher reflectivity ...

Page 13: ...Area Lead out Area Center hole Clamping and Label Area Information Area PCA PMA Test Area Count Area Diameter 15 mm Diameter 45 mm Diameter 120 mm Unrecorded Disc Tsl 00 35 65 Tsl 00 15 05 Tsl 00 13 25 Tsl 99 59 74 00 00 00 in out Test Area for performing OPC procedures Count Area to find the usable area immediately in T A Tsl start time of the Lead in Area as encoded in ATIP PMA Program Memory Ar...

Page 14: ...ad_In area so that general Driver can read it Because PCA and PMA area exist before Lead In area General CD Player or CD ROM Drive can t read these areas 9 OPC and ROPC 1 OPC Optimum Power Control This is the first step of writing process because CD writer has its own laser power value and media have different writing characteristics This is determined by the Writing characteristic speed temperatu...

Page 15: ...lose Reference B level value c Normalization of B level is used to eliminate the effect of reflectivity fluctuation The reflected B level value is normalized by the disc reflectivity itself 21 CD R RW Media Write Strategy Determination PCA Test Area Program Area PMA Area Lead In Area Lead out Area OPC PCA Count Area ROPC Recording Capacity of CD R RW 74Minute Recording media 2048 Byte Sector X 75 ...

Page 16: ...1 PDIC IC2 FPDIC C1 R9 R11 R12 R10 C2 GND G D C E RF SW GND H A B F Vc NC GND GND GND Vcc Vc Bin OUT PDIN VOUT VCC VREF VCC GND IOUT IINR IOUT IIN2 GND IIN3 GND RFREQ RAMP GND ENABLE GND OSCEN WEN3 VCC WEN2 GND GND 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 6 5 4 3 2 1 FCS FCS TRK TRK G D C E RF SUM SW PDGND PDVC F B A H PDVCC FPDO FPDVCC FPDGND FPDVC LDVCC LDVCC VR...

Page 17: ...Method A D B C k x F H E G This signal is generated in RF IC IC401 CXA2638R and controls the pick up s left and right shift to find to track on Disc 3 RF Signal A B C D This signal is converted to DATA signal in DSP IC IC201 OTI 9797 23 Pick Up module Photo Diode Tracking Focusing Infrared Iaser k F H E G A D B C A D B C k F H E G Offset TE Tp Sub2 Main Tp 2 Sub1 Track Center F E D C A B H G ...

Page 18: ...2 R423 IC403 IC205 IC301 MICOM IC201 OTI 9797 C456 C455 MPXOUT testmode MPXOUT testmode VRDCN VRDC VRDC R16 R17 R410 C433 R11 10K GND GND RREFSE R9 5K R1 20K R2 20K A OFF B ON A OFF L B HOLD H A SAMPLE B ON RREF WREF ODREF SHOUT WRITEG WFPDG DAC DAC DAC GND Typ 10mV step sbit GND GND Typ 10mV step 8 bit Typ 10mV step 7 bit H RREF R13 R5 R7 20K Read Write 20K 25 8K GND L OPEN H OPEN L WREF RLDON ER...

Page 19: ... CD R Three Laser Power Levels Read Write and Overwrite are used to write on CD R disc and Read Level is used to monitor the output laser power For stabilizing read loop the S H signal RFPDSH which sample and hold the Read Level of laser power in the CD R writing mode is input through Pin 32 of IC401 CXA2638R CD RW Three Laser Power Levels Read Erase and Write are used to write on CD RW disc and E...

Page 20: ... 197 8 9 10 87 2 3 4 5 Offset adj R1 R2 R3 R4 R6 R5 R403 C417 R404 Vref Main S H Gain adj Offset adj CEM CEO CEP TE CE 198 204 TE 58 EQRFP C223 EFM 163 ATFG WOBBLE 132 Limit Gain Amp Side S H SPPO 4 F H E G MPP 2 A D B C DVC Gain adj Gain adj Offset adj LPF 40KHz Gain adj offset adj Limit GCA HPF HPF AGC BPF AGC Slice circuit HPF EQ HPF 63 65 67 x0 25 x5 x3 2 71 38 ...

Page 21: ...cus Error Detector Detector Track Error A B C D E F G H IC401 CXA2638R FE TE TE FE A D Low freq Gain Filter Ditital EQ DAC Sled Control Signal A D IC201 Servo Control OTI9797 LEVEL SHIFT LEVEL SHIFT Tracking Focusing Actuator FAO TAO SLO F F T T Sled Control M SLED MOTOR LEVEL SHIFT SM_A IC501 BD7902C SM_A SM_B SM_B IC501 BD7902C IC402 BU2500FV DAC ...

Page 22: ...racking Servo is to make laser beam trace the data track on disc Tracking Error TE signal is generated from tracking error detection block in CXA2638R IC401 using DPP Differential Push Pull Method DPP method uses not only main beam A B C D but side beams E F and G H for correcting DC offset generated in Push Pull method The remaining procedures of TE signal processing in CXA2638R is similar to Foc...

Page 23: ...a in CD RW 5 CD 40x CAV CD ROM Recorded area in CD R Spindle Servo is controlled by IC401 CXA2638R IC201 OTI9797 and servo signal is output via DMO pin2 OTI 9797 29 Pick up IC401 CXA2638R Wobble Signal Generator RF SRF EQRFP ATFG Decode PLL Frequency Controller CD DSP SERVO LOCK DEFS MOTOR SPEED CONTROLLER FILTER TON DMO ATIP CLV FG Level Shif t Hall Sensor M Spindle Motor IC 301 u COM MUTE SPNFG ...

Page 24: ... BHC3 77 BHC1 76 75 PHC1 BHO1 74 PHO1 73 RECD1C 72 EQRFN 71 EQRFP 70 SRFO 69 RFRP 68 RFCT 67 CEP 66 GND 65 CEM 64 Vcc 63 CEO 62 AUX 61 MPXOUT 60 MPP 59 FE 58 TE 57 TEIN 56 TOK1C 55 TOK2C 54 RFCTC1 53 RFCTC2 52 XTOK 51 50 XTOR XTAND 49 CS 48 WLDON 47 TFGCNT 46 AGCON 45 HOLDSW 44 ERGCNT 43 SCLK 42 SDATA 41 XLAT 40 Vcc 39 DVcc 38 ATFG 37 RECD 36 GND 35 ROPCSH 34 M SPDSH 33 WBLSH 32 RFPDSH 31 WFPDSH 3...

Page 25: ...ction Time Constant 23 CAVC2 External Capacitor connection for Peak Hold Detection Time Constant 24 CAVC3 External Capacitor connection for BPF control voltage smoothing 25 VCT2 Decoupling of VC 26 VCT1 Decoupling of DVC 27 HDVC O Output of DVC 2 Voltage 28 DVC O Output of DSPVCC 2 Voltage 29 VC O Output of VCC 2 Voltage 30 DSPVCC DSP Power 31 WFPDSH I Sample Pulse for Write APC Mode H Sample L Ho...

Page 26: ...nnection for Retriggerable mono multi Time Constant 74 PHO1 O Output of Pick Hold 75 BHO1 O Output of Bottom Hold 76 PHC1 External Capacitor connection for Peck Hold Time Constant 77 BHC1 External Capacitor connection for Bottom Hold Time Constant 78 BHC3 External Capacitor connection for Bottom Hold Time Constant 79 BETAOUT O Output of Beta Value 80 PHO2 O Output of Pick Hold 81 BHO2 O Output of ...

Page 27: ...IC201 OTI 9797 CD R RW Encoder Decoder Write Strategy Chip Block Diagram 33 ...

Page 28: ... Type Description PANICIN 168 IS Panic Input WBLIN 132 IS Wobble In Wobble input digital signal HFSW 167 O HighFrequency ModulationSwitch WGATE NRZWGATE 166 O Write Gate EFM NRZ Write Gate EFM1 183 O EFM1 EFM output EFM2 184 O EFM2 EFM output EFM3 185 O EFM3 EFM output EFMNT1 EFMNT1 ELPBS1 169 O EFMNT1 EFM pit pattern length indicator EFMN Non Delayed EFM Pit Pattern Length Indicator ELPBS1 Extern...

Page 29: ...LPBS4 External Low Pass Filter Band Switch RWSW CD RW Write Gate Switch E11TP EFMSY 175 O EFM11T Pit Pattern EFM11T pit pattern indicator E11TS MONIT SVSY 176 O EFM11T Space Pattern EFM11T space pattern indicator EFCK 177 O EFM Bit Clock EFM bit clock generated from internal clock in CDencoder SMP3 SYEQ 180 O SMP3 Sample and Hold Signal 3 SMP1 MONIT 181 O SMP1 Sample and Hold Signal 1 SMP2 ASYEQ 1...

Page 30: ...PCK WBLCLK 138 O Wobble Clock EEFS LSRPREP 179 O EFM Frame Sync ESFS EFMNRZ 178 O Encoder Subcode Frame Sync PinName Pin Type Description DMO 2 OA Spindle Motor Servo Output SLO 3 OA Sled Servo Output FOO 207 OA Focus Servo Output Focus servo feedback signal TRO 208 OA Tracking Servo Output Tracking servo feedback signal TEBC 194 OA Tracking Error Balance Control FE 197 IA Focus Error TE 198 IA Tr...

Page 31: ...used as a general output port FLAGB 145 O Servo MonitorFlag B FLAGB is used to output one of four internal servo signals FLAGB can also be used as a general output port FLAGC 146 O Servo MonitorFlag C FLAGC is used to output one of four internal servo signals FLAGC can also be used as a general output port FLAGD 149 O Servo Monitor Flag D FLAGD is used to output one of three internal servo signals...

Page 32: ...he start of the 24 bit value on SDATA High indicates the start of the left channel L Differential Audio Output MIO2 R 147 O Multiple I O 2 MIO2 is used to output several internal test signals DEFAULT Audio Bit Clock This is the data bit clock output for SDATA There are 24 cycles of bit clock for each 16 bit audio word R Differential Audio Output MIO3 R 148 O Multiple I O 3 MIO3 is used to output s...

Page 33: ... data from the OTI 9797 on the rising edge of DBWR which is driven by the OTI 9797 and derives its timing from the SCSICLK signal HRD HDMARDY HSTROBE DBRD 71 IPU ATA Read Strobe ATAPI Mode During PIO and DMA transfers the host uses this signal to read data from the device ATA Ultra DMA HostReady Host Data Strobe ATAPI Mode The host uses this signal to indicate it is ready to begin an Ultra DMA rea...

Page 34: ...ers for access USB Differential Serial Data Negative USB Mode CS3FX SCSICLK USBD 58 IS ATA Chip Select 3 ATAPI Mode The host uses this signal to select the ATAPI control block registers for access SCSI Reference Clock SCSI DMA Mode If bit SCSICLKS 07Bh 6 0 this signal is used as the SCSI DMA reference clock 40MHz is recommended If SCSICLKS 1 the internal CD Decoder system clock controlled by bits ...

Page 35: ...ndicates if a drive is active or Drive 1 is present HDASP is controlled by bit DASPEN 020h 5 Firmware can read the state of HDASP from bit DASPb 02Eh 0 HPDIAG 63 IPU OD ATA Passed Diagnostics ATAPI Mode This signal is asserted by Drive 1 to indicate to Drive 0 that it has completed diagnostics HPDIAG is controlled by bit PDIAGEN 020h 6 Firmware can read the state of HPDIAG from bit PDIAGb 02Eh 1 H...

Page 36: ...9 98 97 I O SystemControllerAddress 7 0 Data Bus This bi directional bus transfers 8 bit data When multiplexed mode is enabled see UALE description UAD7 0 also functions as the lower 8 bits of the system controller address bus UAD7 0 is high impedance when not used to transfer data or addresses URD UR W 105 IS Microcontroller Read Strobe In X86 Mode URD is the read data strobe Read or Write Status...

Page 37: ... UCS1 is asserted the system controller can address the RAM directly SDINT 114 OPU CD DSP CD Servo Interrupt Request CLKOUT ARST 65 OOD ATAPI Reset Interrupt Requestor Output OTI 9797 asserts ARST when the host has written the ATAPI Soft Reset Command 08h ARST enabled when bit ARSTEN 02Fh 3 1 can be used as an interrupt request output if ARSTS 02Fh 2 1 or a reset output pulse ARST is cleared for i...

Page 38: ...nk Address 1 When RRCF 0CCh selects 12 row address signals this signal is used as bank address bit 0 up to 4banks are supported RAD11 RBA0 41 O RAM Row ColumnAddress 11 Row and column address 11 SDRAM Bank Address 0 When RRCF 0CCh selects 11 row address signals this signal is the only bank address signal to 2 banks are supported RAD10 RAP 42 O RAM Row ColumnAddress 10 This signal is row and column...

Page 39: ...RAM Mode RRAS indicates that RAD13 0 contains a row address In SDRAM Mode RRAS is asserted to send the row active command RWE RWEL 30 O RAM Write Enable Low In dual CAS DRAM Mode RWE is indicates that RD 0 is write data For dual WE DRAM mode this signal enable writing of the lower data byte RD7 In SDRAM mode RWE is asserted to generate the write command ROE LDQM 32 O DRAM OutputEnable In DRAM Mode...

Page 40: ...AM Mode UDQM is driven high to disable RAM data output or block write data for RD15 8 PinName Pin Description VDD 22 83 108 189 Digital Power 2 5 Volts IOVDD 9 34 46 57 74 92 134 173 I O Power 3 3 Volts VSS 10 23 35 47 60 68 75 84 93 109 135 174 190 Digital Ground AVDD 152 153 157 158 199 206 Analog Power 3 3 Volts AVSS 1 150 155 156 165 195 200 Analog Ground VREF 164 196 Reference voltage 1 65 Vo...

Page 41: ...0 PA0 P07 P17 P27 P37 P47 P57 P67 P77 P87 P97 PA3 8 8 8 8 8 8 8 8 8 8 8 AIN0 1 BIN0 1 ZIN0 1 2 Clock control circuit RAM ROM SIN0 SOT0 SCK0 IN0 1 OUT0 1 I O timers 16 bit input capture x 2 16 bit output conveyer x 6 16 bit free run timer Chip selects CS0 1 2 3 to to to to to to to to to to to 2 3 4 5 P00 to P07 8pin Incorporates a pull up resistor setting register for input P10 to P17 8pin Incorpo...

Page 42: ... address data bus upper I O pins 91 to 98 93 to 100 D08 to D15 C CMOS In the non multiplex mode they function as external data upper output pins P20 to P23 General purpose I O ports When the corresponding bit of the HACR register is 0 the pins function as address upper output pins A20 to A23 A16 to A19 When the multiplex mode is enabled and the corresponding bit of the HACR register is 1 the pins ...

Page 43: ...external address pin 13 15 ZIN1 E CMOS H The pin is an 8 16 bit up and down timer input pin ch1 P36 P37 General purpose I O port A06 A07 In the non multiplex bus mode the pins function as external address pins 14 and 15 16 and 17 PWC0 PWC1 E CMOS H This pin functions as PWC input pin P40 General purpose I O port A08 In the non multiplex bus mode the pin functions as an external address pin 16 18 S...

Page 44: ...2 74 HRQ D CMOS When the external bus mode is enabled the pin functions as the hold request input HRQ pin When the HDE bit of the EPCR register is 0 the pin functions as a general purpose I O port P55 General purpose I O port When the external bus mode is enabled and the HDE bit of the EPCR register is 1 the pin functions as the HAKX pin 73 75 HAKX D CMOS When the external bus mode is enabled the ...

Page 45: ... Chip select 0 P91 General purpose I O port SOT1 The pin functions as the I O clock I O pins 57 59 CS1 D CMOS Chip Select 1 P92 General purpose I O port SCK1 The pin functions as the SCI clock I O pin 58 60 CS2 E CMOS H Chip Select 2 P93 General purpose I O port FRCK The pin functions as the external clock input pin while the free running timer is in use ADTG The pin functions as the external trig...

Page 46: ...P Polarity COMP PWM OUT FG LIMIT LIMIT 15K 15K STBY BRAKE CONTROL 54 1 DVCC HU 2 HU 3 HV 4 HV 5 HW 6 HW 7 HB 8 PGND1 9 U 10 SPVM1 11 V 12 GND 13 GND 14 GND 15 GND 16 GND 17 PGND2 18 W 19 SPVM2 20 SPRNF 21 FG 22 CTL1 23 CTL2 24 SPIN 25 DGND 26 LDIN 27 VC 53 FCIN 52 TKIN 51 VCC 50 LDO 49 LDO 48 TKO 47 TKO 46 FCO 45 FCO 44 AVM 43 GND 42 GND 41 GND 40 GND 39 GND 38 AGND 37 SLO1 36 SLO1 35 SLO2 34 SLO2...

Page 47: ...k pre ground 26 LDIN Loading driver input 27 VC Reference voltage input Terminal Symbol Terminal function 54 DVCC PWM block control power supply 53 FCIN Focus driver input 52 TKIN Tracking driver input 51 VCC BTL pre and Loading power supply 50 LDO Loading driver positive output 49 LDO Loading driver negative output 48 TKO Tracking driver positive output 47 TKO Tracking driver negative output 46 F...

Page 48: ...ilt in D A converters with output buffer operational amplifiers 2 Outputs of 12 channels are used for adjustment control of servo circuits and references Block Diagram Pin No Pin Name Description 1 Vref GND 2 AO3 B level Reference 3 AO4 Write power reference 4 AO5 Write power reference 5 AO6 HAVC Offset 6 AO7 Track SPP Reference 7 AO8 Sled Move 8 AO9 Hall Bias 9 AO10 Sled Offset 10 Vref 4V Pin No ...

Page 49: ...C100 change 0V to 5V at the power supply initial input mode NO NO YES YES YES YES 55 Is the X201 and X301 oscillating Check the X201 and X301 Check the the IC201 and IC301 NO Check IC101 BA033 Check IC401 CXA 2638R Check IC102 PQ1 R251M22P Check the IC403 NJM3414AM NO NO Check it after connecting the power cable only on interface cable for NO Reset or Power ON YES OK Is the pin 1 of IC101 3 3V Is ...

Page 50: ...nition is abnormal After eject tray Insert CD R Blank Disc and reloading Does Disc rotate continuously as Disc recognition is abnormal Does Disc stop Go to Sled operating is abnormal Go to Spindle operating is abnormal Go to Laser is abnormal Go to Spindle control is abnormal 1 Go to Spindle control is abnormal 2 Go to Spindle control is abnormal 3 Go to RF output is abnormal NO NO NO YES NO NO NO...

Page 51: ...SW802 Eject s w Tray open close doesn t work NO Check the connection of IC301 pin 29 30 Replace the IC301 NO NO Check the Tray Connector CN801 pin 12 13 Check the Motor Line and Motor YES IsthereTraycontrolsignalinput IC501pin26 Check the connection of IC402 pin 7 Replace the IC402 BU2500FV Check the communication line between IC501 and IC402 BU2500FV NO YES YES YES When CN801 pin 12 13 is open Is...

Page 52: ...2500FV Aren t MUTE1 signla H and MUTE2 signal H IC501 pin 22 23 Check the connection of IC301 pin 29 30 When PN501 is open Is there Sled drive voltage output Replace the Sled Motor YES Check the communication line between IC402 and IC301 MICOM NO NO YES YES Check the Connection PN501 Is there Sled drive voltage output IC501 pin 34 35 36 37 YES NO NO ...

Page 53: ...1 pin 24 Replace the IC501 Is there Spindle drive voltage output IC501 pin 9 11 18 Check the Spindle Connector PN502 Replace the Spindle Motor NO NO NO NO YES Aren t MUTE1 signal H and MUTE2 signal H IC501 pin 22 23 NO YES YES YES YES Check the connection of IC301 pin 29 30 Replace the IC301 MICOM Are MUTE1 signal H and MUTE2 signal L IC501 pin 22 23 NO YES Is there SPNFG signal input IC301 pin 62...

Page 54: ...YES Replace the Pick Up Is there Focus Search drive voltage output IC501pin45 46 NO Check the connection of IC201 pin 207 Check the communication line between IC201 and IC301 Replace the IC201 OTI 9797 YES NO YES Spindle control is abnormal 1 CD ROM Disc Does FOCUS Servo operate normally Is there output normally IC401 pin 71 Go to Spindle operating is abnormal Replace the IC401 CXA2638R NO YES Rep...

Page 55: ...e Replace the IC301 MICOM NO Is there WBLIN signal input IC201 pin 132 Spindle control is abnormal 3 Go to RF output is abnormal Is there ATFG signal output IC401 pin 38 YES YES NO Replace the IC401 CXA2638R NO Is there DMO signal output IC201 pin 2 YES Replace the IC201 OTI 9797 Go to Spindle operating is abnormal NO Go to RF output is abnormal Is there RECD signal output normally IC401 pin 37 ...

Page 56: ... in Focusing Up Down IC201 pin 207 Replace the IC201 OTI 9797 NO YES 62 Is there PICK UP A B C D output normally PN401pin7 8 15 16 RF output is abnormal Check the PICK UP FFC Replace the PICK UP Go to Laser is abnormal YES IsRRF signaloutputnormal IC401pin85 FirstRecognitiontry Over 1 8Vpp SecondRecognitiontry Over0 9Vpp YES NO Check the connection between PN401 and IC401 Replace the IC401 CXA2638...

Page 57: ... is abnormal Check the connection between IC401 Pin58 and IC201 Pin198 NO Is TE signal input normal in Focusing ON and Tracking OFF IC201 pin 198 NO Replace the IC201 OTI 9797 Check the Driver IC IC501 and P U referring to Focus Actuator operating is abnormal Is there TEO signal output in Tracking ON IC201 pin 208 NO Is PICK UP E F G H output normal PN401 pin 6 9 14 17 YES YES YES NO ...

Page 58: ...rs of How to use Test Tool Dragon Execute D Laser Inspection of How to use Test Tool Dragon YES OK NO Laser is abnormal OFF LEVEL NG VRDC NG E Normal Normal F NO Execute C Laser Power Setup of How to use Test Tool Dragon NO YES NO NO VWDC1 NG YES YES YES ...

Page 59: ... 18 Check and replace the IC402 DAC Check the communication line between IC301 pin 60 and IC402 pin 15 Check and replace the IC301 Micom YES IC401 pin 100 FPDO 2 9 0 3V NO Check the connection of PN401 pin 19 FPDO Check and replace the PN401 PICK UP YES PN401 Pin 25 VRDC 1 0 0 3V NO Check the connection of IC401 pin 97 Check and replace the IC401 Execute D Laser Inspection of How to use Test Tool ...

Page 60: ...e D Laser Inspection of How to use Test Tool Dragon YES YES YES NO Check the connection of IC201 pin 183 184 Check and replace the IC201 OTI 9797 PN401 Pin 30 WE1 H YES NO Check the connection of IC401 pin 25 Check and replace the IC401 CXA2638R IC401 Pin 92 WREF 0 8 0 2V YES NO Check the connection of PN401 pin 19 FPDO PN401 pin 22 FVREF Check and replace the PN401 PICK UP Check and replace the I...

Page 61: ... if the disc has long width Scratch change it Does the disc have any Dust Scratch Fingerprint YES NO Use LG bundle Software Write Tool Version Roxio ECDC 5 1 61 Direct CD 5 10 116 Is the write Tool version supported by LG CD RW Drive YES NO NO Check disc information on Writng Tool If you get some data information with Non Recordable Disc Message the disc is finalized Finalized Disc unrecordable Di...

Page 62: ...ritten file read normally Is the re written file readed normally Is ROPCSH input signal Pulse when CD R writing IC401 pin 32 The blink LED1 when writing started Do the IC301 MICOM pin 22 and pin 23 output toggle signals during Writing Check the connection between IC301 pin 97 23 and LED Check and replace the LED801 802 YES YES YES YES YES NO NO Check and replace the IC301 Eject Tray Check the conn...

Page 63: ...and IC401 Check and replace the IC201 Are IC201 pin 183 EFM1 pin 184 EFM2 IC401 pin 34 pin 33 IC201 pin 185 pulse signal NO Check the connection lines of IC201 pin 183 184 Check and replace the IC201 Are PN401 pin 31 WE2 30 WE1 19 FPDO pulse signals NO WFPDSH check the connection of IC201 pin188 RFPDSH check the connection of IC201 pin180 WBLSH check the connection of IC201 pin182 M S PDSH check t...

Page 64: ...ES Dragon Execute LD Stop Dragon Execute STOP Execute E ALPC Test For AS of How to use Test Tool Dragon CD RW Rec Mode Check the connection lines of IC201 pin 183 184 Check and replace the IC201 Are PN401 pin 31 WE2 30 WE1 19 FPDO pulse signals NO WFPDSH check the connection of IC201 pin188 RFPDSH check the connection of IC201 pin180 WBLSH check the connection of IC201 pin182 M S PDSH check the co...

Page 65: ... L IC301 Pin 73 Do LOUT ROUT signals output IC201 Pin 151 154 Do audio Line signals output PN201 Pin 51 54 NO NO NO Check and replace the JK801 Does the audio signal output at the headphone jack JK801 NO Check the connection of PN801 and PN802 Check and replace the IC801 Do audio signals output IC801 Pin1 7 NO YES YES YES YES YES Normal ...

Page 66: ... Check and replace IC401 CXA2638R IC401 pin 84 RRFIN NO YES Check the connection of IC401 pin 76 77 Check and replace IC401 IC301 pin 39 PHO1 IC401 pin 84 RRFIN maximum value NO YES Check the connection of IC401 pin 61 Check and replace IC401 IC301 pin 42 MPXOUT AUX3 NO NO YES IC301 pin 41 BHO1 IC401 pin 84 RRFIN minimum value YES Insert Test Disk TCD T84 and play 1x Normal ...

Page 67: ...propriately then GCE 8240B displays on Target Device 8 Select GCE 8240B on Target Device and then Click OK B Check ALPC Parameters 1 Select VIEW on the menu bar 2 Click Addition Func on VIEW window New frame will be displayed 3 Click ALPC Para tab ALPC Parameters 1 CD R READ Reference DAC 50 160 2 CD RW READ Reference DAC 50 160 3 VWDC1 Reference DAC for 10 0mW 50 110 4 VWDC1 Offset 0 10 5 VWDC2 D...

Page 68: ...asure LD Power with LD Powermeter Type the result in the blank Read Power box If you don t have LD Powermeter type the written value on pickup without decimal point including two digits under the decimal point ex 11 34mW 1134 6 Click VWDC1 button and follow above step 5 But VWDC1 result should be filled in the Write Power box 7 Click Setup button and Result will displayed with OK or NG 8 Close Las...

Page 69: ...spection VRDC VWDC FPD Level Check 1 Remove disc on the Tray 2 Select ALPC OPC on the menu bar and select Laser Inspection menu then Laser Power Test window will appear 3 Click Trigger button then the result will displayed with OK or NG separately 4 Close Laser Power Test window ...

Page 70: ...ill appear 3 Select Specific mode of ALPC Test mode and click Trigger button then LD will be on 4 Implement test like measuring LD Power 5 Click Off button then LD Off 6 Close Laser On Window Caution Laser beam is emitted continuously on the VRDC Loop and CW Power Test Pulse_Type Laser output like real writing is emitted on the CD R Rec Mode and CD RW Rec Mode ...

Page 71: ...1 IC401 X301 IC501 Line out R ch L ch IC201 IC202 IC203 IC801 IC301 H O S T SDRAM 8M Byte EEPROM 32 Kbit AUDIO Circuitry Headphone AMP BH3544F I F Cable Data OTI 9797 DECODER ENCODER ATIP Demodulator Wirte Strategy I F MB90F482 SERVO DSP System Controller FLASH MEMORY 2 Mbit 3 3V Reg 2 5V Reg 5V GND GND 12V 5V GND GND 12V SPINDLE MOTOR SLED MOTOR LOADING MOTOR FOCUS COIL TRACKING COIL BLOCK DIAGRA...

Page 72: ...02 A01 020 028 029 030 400 032 400 021 020 050 413 413 413 001 413 430 012 009 008 013 014 005 035 016 015 004 006 A B C D E F G H 1 2 3 4 5 017 003 002 010 011 400 400 030 031 027 026 034 025 430 419 021 400 11 12 EXPLODED VIEW ...

Search results

Summary of Contents for GCE-8240B

Reviews:

Related manuals for GCE-8240B

Brands by name

Popular brands

LG GCE-8240B, Service Manual

Search results

Summary of Contents for GCE-8240B

Reviews:

Related manuals for GCE-8240B

Brands by name

Popular brands