41
HIRQ /
SIRQ#
67
O
TS
ATA Interrupt Request (ATAPI Mode):
This signal is used to interrupt the
host system. HIRQ is controlled by bit HINTRQ (02Eh.3).
I
SCSI Interrupt (SCSI DMA Mode):
This signal is asserted by the SCSI
Protocol Controller to interrupt the system controller. DTE(0E3h.2) is set to
1 when SIRQ# is asserted.
IORDY /
DDMARDY# /
DSTROBE
70
O
TS
ATA IO Ready (ATAPI Mode):
When PIO mode is active, the device de-
asserts this signal to extend any host read data access cycle when the
host
FIFO is empty or EDAC throttling is enabled.
ATA Ultra DMA Device Ready / Data Strobe (ATAPI Mode):
The device
uses this signal to indicate it is ready to begin an Ultra DMA write data
transfer. During a read transfer, the device uses this signal to strobe data
to the host.
HDASP#
56
I
PU/OD
ATA Drive Active/Drive 1 Present (ATAPI Mode):
This is a time-
multiplexed signal that indicates if a drive is active or Drive 1 is present.
HDASP# is controlled by bit DASPEN (020h.5). Firmware can read the
state of HDASP# from bit DASPb (02Eh.0).
HPDIAG#
63
I
PU/OD
ATA Passed Diagnostics(ATAPI Mode):
This signal is asserted by Drive 1
to
indicate to Drive 0 that it has completed diagnostics. HPDIAG# is
controlled by bit PDIAGEN (020h.6). Firmware can read the state of
HPDIAG# from bit PDIAGb (02Eh.1).
HRST#
55
I
S
Host Reset:
The host uses this signal to reset the OTI-9797.
RD15 /
DJ
17
I/O
Drive Jumper Input:
When HRST# (if bit DJRSTb [019h.5] = 0) or PRST# is
asserted, the inverted state of DJ is used to set bit DRV1b (02Eh.4) to set
the device as an IDE master or slave. DJ is used as RD15 (RAM Data
Bus bit 15) after reset.
RD12 /
IFSEL
20
I/O
Host Interface Select:
When HRST# or PRST# is
asserted, IPSEL selects
whether the ATAPI (if IFSEL is high) or SCSI pass-through (if IFSEL is
low) host interface is enabled. Bit SCSIEN (07Bh.0) also selects between
SCSI and ATAPI Modes. After reset this signal is used as RD12 for the
buffer interface.
Pin Name
Pin #
Type
Description
