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Copyright © 2011 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
7. CIRCUIT DIAGRAM
10u
C217
R283
10K
VDD_3.3
10u
C225
0.1u
C224
R206
0
I
N
D
33
2
R
10K
R238
10K
R231
DNI
C223
VDD_3.3
10K
R277
R279
10K
VDD_3.3
DNI
R224
49.9
0.01
R220
49.9
R217
0.01
TP200
K1
32
2
R
K1
92
2
R
0.1u
C222
VDD_2.5
0
R218
10
R239
10
R241
22
R242
22
R243
22
R247
22
R245
22
R250
22
R248
22
R259
22
R257
22
R255
22
R254
0.1u
C202
0.1u
C203
0.1u
C205
DNI
R244
0.1u
C204
0.1u
C207
0.1u
C208
DNI
R246
0.1u
C206
10n
C209
10n
C210
10n
C211
10n
C212
10n
C216
10n
C215
10n
C214
10n
C213
U200
J5
J4
H4
A12
J2
D19
R2
R1
T1
T2
U1
U2
V1
AB17
AA17
AB18
AA18
AB19
AA19
AB20
AA20
G22
G21
F22
F21
E22
E21
D22
D21
D5
A20
B20
A21
A22
B22
P4
T5
R4
M2
M1
T4
Y1
W1
W2
V2
A14
B14
L2
K1
L1
B15
B12
H1
U4
U5
D15
A15
B16
A16
A17
B17
A18
B18
A19
B19
W16
W17
P2
N1
P1
N2
K21
K22
T21
T22
J22
U22
AB22
H21
AA21
J21
L22
L21
H22
U21
AA22
M21
Y21
Y22
W21
W22
V22
V21
M22
N21
N22
P21
P22
D17
D16
D18 SWREG_VDDO
REG_AVSS1
REG_AVSS2
VREF
DDR_ADDRESS_0
DDR_ADDRESS_1
DDR_ADDRESS_2
DDR_ADDRESS_3
DDR_ADDRESS_4
DDR_ADDRESS_5
DDR_ADDRESS_6
DDR_ADDRESS_7
DDR_ADDRESS_8
DDR_ADDRESS_9
DDR_ADDRESS_10
DDR_ADDRESS_11
DDR_ADDRESS_12
DDR_ADDRESS_13
DDR_BANK_0
DDR_BANK_1
DDR_DM_0
DDR_DM_1
DDR_DQS_0
DDR_DQS_1
DDR_CKE
DDR_WE_N
DDR_CLK
DDR_CLK_N
DDR_RAS_N
DDR_CAS_N
SFLASH_C
SFLASH_CS_L
SFLASH_D
SFLASH_Q
NCOMP
PCOMP
GPIO0/LED0
GPIO1/LED1
GPIO2/LED2
GPIO3/LED3
GPIO4/LED4
GPIO5/LED5
GPIO6/LED6
GPIO7/LED7
GPIO8/LED8
GPIO9/LED9
GPIO10/EXT_LNA_2G_GAIN_0
GPIO11/EXT_LNA_2G_GAIN_1
GPIO12/MIMOPHY_PA_CNTRL_2G_0
GPIO13/MIMOPHY_PA_CNTRL_2G_1
GPIO14/MIMOPHY_CORE0_ANT_SHD
GPIO15/MIMOPHY_CORE1_ANT_SHD
GPIO16/MIMOPHY_CORE0_ANT1_RX
GPIO17/MIMOPHY_CORE0_ANT1_TX
GPIO18/MIMOPHY_CORE1_ANT0_RX
GPIO19/MIMOPHY_CORE1_ANT0_TX
GPIO20/SCLK
GPIO21/CS
GPIO22/SDO_SCL
GPIO23/SDI_SDA
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO31
SWREG_PDRIVE
SWREG_NDRIVE
SWREG_VFB_SEN
VCNTL_2P5CONT
VSENSE2P5_2P5CONT
VREG3P3_VDD3P3
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
JTAG_TRST_L
TDI
TDO
TMS
TCK
UART_RX
UART_TX
EXT_POR_L
MIMOPHY_EXT_LNA_2G_PU_0
MIMOPHY_EXT_LNA_2G_PU_1
NC1
NC2
NC3
VDD_3.3
1n
C200
0.1u
C226
0.1u
C219
VDD_3.3
10p
C201
10K
R281
DNI
R251
DNI
R249
DNI
R253
DNI
R252
DNI
R258
DNI
R256
DNI
R261
DNI
R260
DNI
R264
DNI
R262
DNI
R269
DNI
R267
22
R268
22
R266
22
R265
22
R263
22
R275
22
R274
22
R273
22
R272
VDD_2.5
TP204
TP202
TP205
TP203
TP201
DNI
R271
DNI
R270
VDD_3.3
100K
R205
VDD_3.3
DNI
C221
K0
1
51
2
R
K0
1
41
2
R
K0
1
61
2
R
U202
EUSY0432601
N25Q128-A13BF840E
9
5
4
6
3
7
2
8
1 S_
VCC
DQ1 HOLD_/DQ3
W_VPP/DQ2
C
VSS
DQ0
G_SLUG
0.1u
C218
VDD_2.5
DNI
R219
0
R210
R276
DNI
DNI
R278
R280
DNI
DNI
R282
VDD_3.3
U201
EUSY0432501
MT46V16M16P-6TIT
66
48
34
64
58
52
12
6
65
63
62
60
59
57
56
54
13
11
10
8
7
5
4
2
49
61
55
15
9
3
33
18
1
53
43
25
17
14
50
19
21
23
22
24
44
46
45
27
26
51
16
47
20
42
41
28
40
39
38
37
36
35
32
31
30
29 A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
LDM
UDM
LDQS
UDQS
BA0
BA1
CK
CK/
CKE
_CS
_CAS
_RAS
_WE
DNU1
DNU2
NC1
NC2
NC3
NC4
NC5
VDD1
VDD2
VDD3
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VREF
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSS1
VSS2
VSS3
0.1u
C220
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
L
K
J
I
H
G
F
E
D
C
B
A
L
K
J
I
H
G
F
E
D
C
B
A
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
DNI
R201
TP212
R200
0
TP207
CN200
conn_14p_00-8261-1432
14PIN_GEN_CON
8
7
9
6
10
5
11
4
12
3
13
2
14
1
TCK
GND5
_TRST
GND4
TDO
GND3
_ASEBRK
UVCC
TMS
GND2
TDI
GND1
_RESETP
NC
R221
0
04
2
R
00
1
VDD_3.3
DNI
R207
VCNTL
SWREG_NDRIVE
SWREG_PDRIVE
VSENSE2P5
SWREG_VFB_SEN
LT_EN
PWR_LED
LTE_PWR_EN
PERST/
UART_SEL
W_DISABLE/
USB0_SENSE/
LAN1_ACT_GPIO1
NP_UART_RX
NP_UART_TX
VRXA1_1
VTXA1_1
VRXA0_0
VTXA0_0
MODE3
MODE2
MODE1
EXT_POR/
EXT_POR/
NP_USIM_DET/
LTE_UART_CTS
SFLASH_DATA_IN
SFLASH_DATA_IN
SFLASH_CS
SFLASH_CS
SFLASH_DATA_OUT
SFLASH_DATA_OUT
SFLASH_CLK
SFLASH_CLK
VREF
VREF
VREF
SD_DDR_CLK
SD_DDR_CLK
SD_DDR_CLK_N
SD_DDR_CLK_N
SDRAM_CLK
SDRAM_CLK
SDRAM_CLK_N
SDRAM_CLK_N
VTXA1_0
VTXA1_0
VRXA1_0
VRXA1_0
VTXA0_1
VTXA0_1
SDRAM_DQS_0
SDRAM_DQS_0
SD_DDR_DQS_0
SD_DDR_DQS_0
SDRAM_DQS_1
SDRAM_DQS_1
SD_DDR_DQS_1
SD_DDR_DQS_1
SDRAM_DATA_0
SDRAM_DATA_0
SDRAM_DATA_1
SDRAM_DATA_1
SDRAM_DATA_2
SDRAM_DATA_2
SDRAM_DATA_3
SDRAM_DATA_3
SD_DDR_DATA_0
SD_DDR_DATA_0
SD_DDR_DATA_1
SD_DDR_DATA_1
SD_DDR_DATA_2
SD_DDR_DATA_2
SD_DDR_DATA_3
SD_DDR_DATA_3
SD_DDR_DATA_7
SD_DDR_DATA_7
SDRAM_DATA_4
SDRAM_DATA_4
SDRAM_DATA_5
SDRAM_DATA_5
SDRAM_DATA_6
SDRAM_DATA_6
SDRAM_DATA_7
SDRAM_DATA_7
SD_DDR_DATA_4
SD_DDR_DATA_4
SD_DDR_DATA_5
SD_DDR_DATA_5
SD_DDR_DATA_6
SD_DDR_DATA_6
SD_DDR_DATA_11
SD_DDR_DATA_11
SDRAM_DATA_8
SDRAM_DATA_8
SDRAM_DATA_9
SDRAM_DATA_9
SDRAM_DATA_10
SDRAM_DATA_10
SDRAM_DATA_11
SDRAM_DATA_11
SD_DDR_DATA_8
SD_DDR_DATA_8
SD_DDR_DATA_9
SD_DDR_DATA_9
SD_DDR_DATA_10
SD_DDR_DATA_10
SD_DDR_DATA_15
SD_DDR_DATA_15
SDRAM_DATA_12
SDRAM_DATA_12
SDRAM_DATA_13
SDRAM_DATA_13
SDRAM_DATA_14
SDRAM_DATA_14
SDRAM_DATA_15
SDRAM_DATA_15
SD_DDR_DATA_12
SD_DDR_DATA_12
SD_DDR_DATA_13
SD_DDR_DATA_13
SD_DDR_DATA_14
SD_DDR_DATA_14
SDRAM_ADDR_0
SDRAM_ADDR_0
SDRAM_ADDR_1
SDRAM_ADDR_1
SDRAM_ADDR_2
SDRAM_ADDR_2
SDRAM_ADDR_3
SDRAM_ADDR_3
SDRAM_ADDR_4
SDRAM_ADDR_4
SDRAM_ADDR_5
SDRAM_ADDR_5
SDRAM_ADDR_6
SDRAM_ADDR_6
SDRAM_ADDR_7
SDRAM_ADDR_7
SDRAM_ADDR_8
SDRAM_ADDR_8
SDRAM_ADDR_9
SDRAM_ADDR_9
SDRAM_ADDR_10
SDRAM_ADDR_10
SDRAM_ADDR_11
SDRAM_ADDR_11
SDRAM_ADDR_12
SDRAM_ADDR_12
SDRAM_ADDR_13
SDRAM_ADDR_13
SDRAM_BA_0
SDRAM_BA_0
SDRAM_BA_1
SDRAM_BA_1
SDRAM_DM_0
SDRAM_DM_0
SDRAM_DM_1
SDRAM_DM_1
SDRAM_CKE
SDRAM_CKE
SDRAM_WE_N
SDRAM_WE_N
SDRAM_RAS_N
SDRAM_RAS_N
SDRAM_CAS_N
SDRAM_CAS_N
C0_SH_ANT
C0_SH_ANT
REV_CHK_0
REV_CHK_0
REV_CHK_1
REV_CHK_1
REV_CHK_2
REV_CHK_2
REV_CHK_3
REV_CHK_3
LTE_UART_RTS
USB1_SENSE/
NP_USB1_SELECT
HW REVISION CHECK
REV.1.0
DDR1 MEMORY[256Mb]
SETTING
SERIAL FLASH[128Mb]
REV.1.1
REV.1.2
REV_CHK_0 REV_CHK_1 REV_CHK_2 REV_CHK_3
0
0
0
0
0
0
0
1
0
0
1
0
REV.1.3
0
0
1
1