3. TECHNICAL BRIEF
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3. TECHNICAL BRIEF
3.2 LTE(SUB)
3 2 1 LTE Modem (L2000 U201)
The L2000 CPU Subsystem consists of an embedded ARM1136JF-S microprocessor and peripherals, which
supports AMBA AHB bus interface(Main-AHB & Sub-AHB).
The peripherals was included the DMA Controller, DDR Controller, L2000 Modem Subsystem, EPI, P-SPI, SMI,
SRAM Controller, Flash Memory Controller, SDIO, USBs, Crypto C ell, Boot ROM, Internal SRAM by AMBA AHB
bus interface and CPU APB Bridge(AHB2APB) which controls SIM, UART0, UART1, GPIO, Timer(TMU, TMOS),
W t h D
Ti
I2C I t
t C t ll
SYSC CPG DBG b AMBA APB b i t f
3.2.1 LTE Modem (L2000, U201)
Watch Dog Timer, I2C, Interrupt Controller, SYSC, CPG, DBG, by AMBA APB bus interface.
Figure 3.8 L2000 Functional Block Diagram