2
8
LatticeSC PCI Express x1
Lattice Semiconductor
Evaluation Board User’s Guide
Figure 15. FPGA Banks
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
QDR_READ_N
QDR_WRITE_N
QDR_A4
QDR_A0
QDR_A1
QDR_A2
QDR_A3
QDR_A5
QDR_A6
QDR_A7
QDR_A8
QDR_A9
QDR_A10
QDR_A11
QDR_A12
QDR_A13
QDR_A14
QDR_A15
QDR_A17
QDR_A16
QDR_D12
QDR_D10
QDR_D11
QDR_D13
QDR_D14
QDR_D15
QDR_D16
QDR_D3
QDR_D5
QDR_D0
QDR_D1
QDR_D17
QDR_D2
QDR_D4
QDR_D6
QDR_D9
QDR_D7
QDR_D8
QDR_Q[0..17]
QDR_Q0
QDR_Q1
QDR_Q2
QDR_Q3
QDR_Q4
QDR_Q5
QDR_Q7
QDR_Q8
QDR_Q6
QDR_Q9
QDR_Q10
QDR_Q12
QDR_Q14
QDR_Q13
QDR_Q11
QDR_Q15
QDR_Q16
QDR_Q17
QDR_K
QDR_K#
QDR_D[0..17]
LOOP_P2
LOOP_N2
LOOP_P3
LOOP_N3
LOOP_P1
LOOP_N1
LOOP_P0
LOOP_N0
LOOP_P0
LOOP_N0
LOOP_P1
LOOP_N1
DIFFR_3
DIFFR_3
LVDS_OUTP
LVDS_OUTN
SC_QDR_VREF
SC_QDR_VREF
SC_QDR_VREF
LOOP_N2
LOOP_P2
LOOP_N3
LOOP_P3
LVDS_INP
LVDS_INN
LVDS_PROBEN
LVDS_PROBEP
LA_12
LA_14
LA_11
LA_13
LA_7
LA_5
LA_10
LA_9
LA_6
LA_4
LA_2
LA_1
LA_8
LA_0
LA_3
LA_15
LA_31
LA_30
LA_25
LA_27
LA_22
LA_29
LA_21
LA_24
LA_20
LA_28
LA_26
LA_19
LA_17
LA_18
LA_16
LA_23
RLDRAM_A19
RLDRAM_A18
RLDRAM_A17
RLDRAM_A16
RLDRAM_A15
RLDRAM_A14
RLDRAM_A13
RLDRAM_A12
RLDRAM_A11
RLDRAM_A10
RLDRAM_A9
RLDRAM_A8
RLDRAM_A6
RLDRAM_A5
RLDRAM_A4
RLDRAM_A3
RLDRAM_A7
RLDRAM_A2
RLDRAM_A1
RLDRAM_A0
RLDRAM_Q1
RLDRAM_D0
RLDRAM_D4
RLDRAM_D17
RLDRAM_D16
RLDRAM_D15
RLDRAM_D14
RLDRAM_D12
RLDRAM_D11
RLDRAM_D13
RLDRAM_D10
RLDRAM_D1
RLDRAM_Q15
RLDRAM_Q2
RLDRAM_Q3
RLDRAM_Q0
RLDRAM_Q4
RLDRAM_Q11
RLDRAM_Q5
RLDRAM_Q10
RLDRAM_Q6
RLDRAM_Q17
RLDRAM_Q7
RLDRAM_Q16
RLDRAM_Q8
RLDRAM_Q9
RLDRAM_Q12
RLDRAM_Q13
RLDRAM_Q14
RLDRAM_BA0
RLDRAM_BA1
RLDRAM_BA2
RLDRAM_CK
RLDRAM_CK#
RLDRAM_CS#
RLDRAM_DM
RLDRAM_QVLD
RLDRAM_WE#
RLDRAM_REF#
SC_RLDRAM_VREF
SC_RLDRAM_VREF
RLDRAM_DK#
RLDRAM_DK
RLDRAM_D2
RLDRAM_D3
RLDRAM_D8
RLDRAM_D7
RLDRAM_D9
RLDRAM_D6
RLDRAM_D5
LA_CLK2
LA_CLK1
LA_CLK2
LA_CLK1
LA_2
LA_1
LA_0
LA_3
LA_7
LA_5
LA_10
LA_9
LA_6
LA_4
LA_8
LA_12
LA_14
LA_11
LA_13
LA_22
LA_23
LA_19
LA_20
LA_21
LA_15
LA_17
LA_18
LA_16
LA_24
LA_31
LA_25
LA_27
LA_29
LA_30
LA_26
LA_28
SWITCH5
SWITCH6
SWITCH8
SWITCH3
SWITCH2
SWITCH4
SWITCH1
SWITCH7
QDR_A4
QDR_A5
QDR_A6
QDR_A7
QDR_A8
QDR_A9
QDR_A10
QDR_A11
QDR_A12
QDR_A13
QDR_A14
QDR_A15
QDR_A17
QDR_A16
QDR_A[0.
.1
7]
QDR_A0
QDR_A1
QDR_A2
QDR_A3
SC_QDR_VREF
SC_QDR_VREF
LED5
LED6
LED1
LED2
LED3
LED4
LED7
LED8
RLDRAM_QK0
RLDRAM_QK1
QDR_CQ
ETH_CLK_TO_MAC
ETH_RX_D1
ETH_RX_D3
ETH_RX_D0
ETH_RX_D2
ETH_TX_D4
ETH_TX_D6
ETH_TX_D5
ETH_TX_D7
ETH_TX_D0
ETH_TX_D1
ETH_TX_D2
ETH_TX_D3
ETH_TX_EN
ETH_TX_CLK
ETH_GTX_CLK
ETH_RX_DV
ETH_COL
ETH_CRS
ETH_RX_CLK
ETH_RX_D6
ETH_RX_D4
ETH_RX_D7
ETH_RX_D5
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
SGND
QDR_READ_N
[9]
QDR_WRITE_N
[9]
QDR_D[0..17]
[9]
QDR_Q[0..17]
[9]
QDR_K
[9]
QDR_K_#
[9]
SC_QDR_VREF
[3]
LVDS_INP
[13]
LVDS_INN
[13]
LVDS_PROBEN
[13]
LVDS_PROBEP
[13]
LA_[0..31]
[13]
RLDRAM_Q[0:17]
[11]
RLDRAM_A[0:19]
[11]
RLDRAM_BA0
[11]
RLDRAM_BA1
[11]
RLDRAM_BA2
[11]
RLDRAM_CK
[11]
RLDRAM_CK#
[11]
RLDRAM_CS#
[11]
RLDRAM_DM
[11]
RLDRAM_QVLD
[11]
RLDRAM_WE#
[11]
RLDRAM_REF#
[11]
SC_RLDRAM_VREF
[3]
RLDRAM_DK#
[11]
RLDRAM_DK
[11]
RLDRAM_D[0:17]
[11]
LA_CLK2
[13]
LA_CLK1
[13]
SWITCH[1..8]
[13]
QDR_A[0..17]
[9]
LVDS_OUTN
[13]
LVDS_OUTP
[13]
PCIE_CLKN
[5]
PCIE_CLKP
[5]
FPGA_REFCLKP_R
[8]
FPGA_REFCLKN_R
[8]
LED[1..8]
[13]
RLDRAM_QK0
[11]
RLDRAM_QK1
[11]
QDR_CQ
[9]
ETH_CLK_TO_MAC
[10]
FPGA_REFCLKP_L
[8]
FPGA_REFCLKN_L
[8]
ETH_RX_D[0..7]
[10]
ETH_TX_D[0..7]
[10]
ETH_TX_CLK
[10]
ETH_GTX_CLK
[10]
ETH_TX_EN
[10]
ETH_RX_DV
[10]
ETH_CRS
[10]
ETH_COL
[10]
ETH_RX_CLK
[10]
OSC_IN_3
[7]
OSC_IN_4
[7]
Title
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P
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S
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et
a
D
of
SC PCI EXPRESS Card
1.0
FPGA Banks
C
12
14
Title
v
e
R
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c
ej
or
P
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zi
S
t
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e
h
S
:
et
a
D
of
SC PCI EXPRESS Card
1.0
FPGA Banks
C
12
14
Title
v
e
R
t
c
ej
or
P
e
zi
S
t
e
e
h
S
:
et
a
D
of
SC PCI EXPRESS Card
1.0
FPGA Banks
C
12
14
LOOP[2:3],
Not
Available in SCM15
SCM15 QDR MACO PREFERRED PINS
MUST USE LVCMOS18
BUFFER TYPES
FOR LOGIC ANALYZER
LEDs
and
Switches
Available
in SCM15
& SCM25
SCM25 RLDRAM MACO PREFERRED PINS
BANK 2, 3, 4, 5, 6
VCCIO = 1.8V
BANK 7
VCCIO = 2.5V
PHY to MAC Interface/
Available in SCM15 & SCM25
Off Page Connections
R285
0R-0603SMT
R285
0R-0603SMT
R250
1_1K-0603SMT
R250
1_1K-0603SMT
R248
BOURNS-3224W-202E-2K
R248
BOURNS-3224W-202E-2K
SC-900FPBGA
LEFT
Bank 7
Bank 6
U1M
SC25-900fpBGA
SC-900FPBGA
LEFT
Bank 7
Bank 6
U1M
SC25-900fpBGA
PL55C/LLC_DLLT_IN_E/LLC_DLLT_FB_F
AB6
PL55D/LLC_DLLC_IN_E/LLC_DLLC_FB_F
AC5
PL57C/LLC_PLLT_IN_B/LLC_PLLT_FB_A
AC6
PL57D/LLC_PLLC_IN_B/LLC_PLLC_FB_A
AC7
PL30C/PCLKT6_3
P4
PL56A
AE3
PL16C/DEBUG_BUS13
J6
PL16D
J5
PL17C/ULC_PLLT_IN_B/ULC_PLLT_FB_A
K4
PL17D/ULC_PLLC_IN_B/ULC_PLLC_FB_A
J4
PL18C/DEBUG_BUS12
K5
PL18D/VREF2_7/DEBUG_BUS6
K6
PL22C
E1
PL22D
D1
PL21A
L5
PL21B
M5
PL16A/ULC_PLLT_IN_A/ULC_PLLT_FB_B/DEBUG_BUS11
D3
PL16B/ULC_PLLC_IN_A/ULC_PLLC_FB_B/DEBUG_BUS10
D2
PL17A/ULC_DLLT_IN_C/ULC_DLLT_FB_D/DEBUG_BUS9
E3
PL17B/ULC_DLLC_IN_C/ULC_DLLC_FB_D/DEBUG_BUS8
E2
PL18A/ULC_DLLT_IN_D/ULC_DLLT_FB_C
F3
PL18B/ULC_DLLC_IN_D/ULC_DLLC_FB_C
G3
PL20A
G2
PL20B
G1
PL25A/TESTCFGN
K3
PL25B/DEBUG_BUS7
L3
PL22A
F2
PL22B
F1
PL29A/PCLKT6_0
N2
PL29B/PCLKC6_0
N1
PL30A
N3
PL30B
P3
PL31A
P2
PL31B
R2
PL34A
P1
PL34B
R1
PL35A
T2
PL35B
U2
PL47A
Y2
PL47B
AA2
PL48B
AC1
PL48A
AB1
PL56B
AF3
PL25C/VREF1_7/DEBUG_BUS5
L6
PL25D/DIFFR_7/DEBUG_BUS4
M6
PL35C
T6
PL29C/PCLKT6_1
R7
PL29D/PCLKC6_1
R6
PL31C/PCLKT6_2
T3
PL31D/PCLKC6_2
R3
PL34C/VREF1_6
R5
PL34D
R4
PL47C
Y3
PL47D
W3
PL49A
Y5
PL49B
Y6
PL51A
AD2
PL51B
AE2
PL52A
AC3
PL52B
AD3
PL53A
AC4
PL53B
AD4
PL55A
AF1
PL55B
AG1
PL57A/LLC_DLLT_IN_F/LLC_DLLT_FB_E
AF2
PL57B/LLC_DLLC_IN_F/LLC_DLLC_FB_E
AG2
PL51D/VREF2_6
AB5
PL48C
W5
PL26B/PCLKC7_1/DEBUG_BUS2
K1
PL26A/PCLKT7_1/DEBUG_BUS3
J1
PL27A/PCLKT7_0/DEBUG_BUS1
L1
PL27B/PCLKC7_0/DEBUG_BUS0
M1
PL27C/PCLKT7_2/DEBUG_BUS14
P8
PL27D/PCLKC7_2/DEBUG_BUS15
R8
PL36A
U3
PL36B
V3
PL38A
T1
PL38B
U1
PL39A
T5
PL39B
T4
PL40A
U4
PL40B
U5
PL42A
V1
PL42B
W1
PL42C
U6
PL42D/DIFFR_6
V6
PL43A
V2
PL43B
W2
PL43C
V5
PL43D
V4
PL44A
Y1
PL44B
AA1
R249
0R-0603SMT
R249
0R-0603SMT
SC-900FPBGA
Bottom
Bank 5
Bank 4
U1J
SC25-900fpBGA
SC-900FPBGA
Bottom
Bank 5
Bank 4
U1J
SC25-900fpBGA
PB4C
AD6
PB5A
AJ2
PB5B
AK2
PB5C
AD7
PB7A
AF7
PB7B
AF6
PB8A
AH4
PB8B
AG5
PB9A
AF8
PB9B
AG8
PB11B
AJ3
PB11C
AF9
PB11D
AE10
PB12A
AK3
PB16B
AK5
PB28B
AK11
PB29A
AH15
PB29B
AG15
PB31A
AH12
PB31B
AJ13
PB31C
AD15
PB31D
AE15
PB32A
AK12
PB32B
AK13
PB33A
AJ14
PB33B
AJ15
PB35A
AK14
PB37A
AK16
PB41B
AK19
PB3A/LLC_PLLT_IN_A/LLC_PLLT_FB_B
AH1
PB4A/LLC_DLLT_IN_D/LLC_DLLT_FB_C
AG3
PB4B/LLC_DLLC_IN_D/LLC_DLLC_FB_C
AH2
PB23B/PCLKC5_0
AJ12
PB5D/VREF1_5
AD8
PB3B/LLC_PLLC_IN_A/LLC_PLLC_FB_B
AJ1
PB3C/LLC_DLLT_IN_C/LLC_DLLT_FB_D
AF4
PB3D/LLC_DLLC_IN_C/LLC_DLLC_FB_D
AE5
PB11A
AH3
PB35B
AK15
PB28A
AK10
PB25B/PCLKC5_2
AG14
PB25A/PCLKT5_2
AH14
PB12B
AJ4
PB13A
AE11
PB13B
AF10
PB15A
AH7
PB15B
AH8
PB15C
AE12
PB15D
AE13
PB16A
AK4
PB17A
AJ5
PB17B
AJ6
PB19A
AJ7
PB19B
AJ8
PB20A/PCLKT5_3
AH10
PB20B/PCLKC5_3
AH11
PB20C/PCLKT5_4
AF13
PB20D/PCLKC5_4
AE14
PB21A/PCLKT5_5
AK6
PB21B/PCLKC5_5
AK7
PB21C/DIFFR_5
AF14
PB21D
AF15
PB23A/PCLKT5_0
AJ11
PB23C
AG13
PB23D/VREF2_5
AH13
PB24B/PCLKC5_1
AK9
PB24A/PCLKT5_1
AK8
PB52C/PCLKT4_4
AE19
PB49D
AF19
PB47B/PCLKC4_1
AG18
PB57B
AE23
PB57A
AD23
PB56C
AH21
PB56B
AH23
PB56A
AH22
PB55B
AG22
PB53B
AF21
PB53A
AE21
PB37B
AK17
PB38A
AJ16
PB38B
AJ17
PB38C
AE16
PB39A
AH16
PB39B
AG16
PB38D
AF16
PB42A
AH17
PB41A
AK18
PB42B
AH18
PB42C
AF17
PB42D
AG17
PB43A
AJ18
PB43B
AJ19
PB46A/PCLKT4_2
AK20
PB46B/PCLKC4_2
AK21
PB47A/PCLKT4_1
AF18
PB49A/PCLKT4_0
AJ20
PB49C/VREF2_4
AG19
PB51A/PCLKT4_5
AK22
PB51B/PCLKC4_5
AK23
PB51C/DIFFR_4
AH19
PB51D
AH20
PB52D/PCLKC4_4
AE20
PB52B/PCLKC4_3
AK25
PB52A/PCLKT4_3
AK24
PB59A
AH24
PB59B
AH25
PB69C/LRC_DLLT_IN_D/LRC_DLLT_FB_C
AG28
PB69D/LRC_DLLC_IN_D/LRC_DLLC_FB_C
AG29
PB64B
AF25
PB64A
AG25
PB69B/LRC_PLLC_IN_A/LRC_PLLC_FB_B
AH30
PB67A
AJ28
PB67B
AH28
PB67C/VREF1_4
AE24
PB67D
AE25
PB68C
AE26
PB68D
AD25
PB60A
AK28
PB63A
AF24
PB63B
AG24
PB60B
AK29
PB60C
AE22
PB61A
AH26
PB61B
AH27
PB68A/LRC_DLLT_IN_C/LRC_DLLT_FB_D
AJ29
PB68B/LRC_DLLC_IN_C/LRC_DLLC_FB_D
AH29
PB69A/LRC_PLLT_IN_A/LRC_PLLT_FB_B
AJ30
PB65A
AG26
PB65B
AF27
PB55A
AG21
PB49B/PCLKC4_0
AJ21
SC-900FPBGA
RIGHT
Bank 2
BANK 3
U1N
SC25-900fpBGA
SC-900FPBGA
RIGHT
Bank 2
BANK 3
U1N
SC25-900fpBGA
PR40A
R27
PR40B
T27
PR42A
V28
PR42B
W28
PR43A
T30
PR43B
U30
PR43C
V26
PR43D
W26
PR44A
V29
PR44B
W29
PR47A
V30
PR47B
W30
PR47C
Y27
PR47D
W27
PR48A
Y30
PR48B
AA30
PR49A
AA25
PR49B
AB25
PR51A
AD30
PR51B
AE30
PR52A
AB28
PR52B
AC28
PR53A
AD29
PR53B
AE29
PR55A
AF30
PR55B
AG30
PR55C/LRC_DLLT_IN_E/LRC_DLLT_FB_F
AB26
PR55D/LRC_DLLC_IN_E/LRC_DLLC_FB_F
AC26
PR56A
AC27
PR56B
AD28
PR57C/LRC_PLLT_IN_B/LRC_PLLT_FB_A
AD26
PR57D/LRC_PLLC_IN_B/LRC_PLLC_FB_A
AC25
PR25D/DIFFR_2
M26
PR42D/DIFFR_3
V25
PR48C
Y25
PR42C
U25
PR29C/PCLKT3_1
R26
PR29D/PCLKC3_1
R25
PR16A/URC_PLLT_IN_A/URC_PLLT_FB_B
D28
PR16B/URC_PLLC_IN_A/URC_PLLC_FB_B
E28
PR17A/URC_DLLT_IN_C/URC_DLLT_FB_D
D29
PR17B/URC_DLLC_IN_C/URC_DLLC_FB_D
D30
PR18A/URC_DLLT_IN_D/URC_DLLT_FB_C
G28
PR18B/URC_DLLC_IN_D/URC_DLLC_FB_C
F28
PR20A
G27
PR20B
H27
PR21A
L27
PR21B
M27
PR22A
E29
PR22B
E30
PR25A
F29
PR25B
G29
PR25C/VREF1_2
M25
PR26A/PCLKT2_1
H30
PR26B/PCLKC2_1
J30
PR27A/PCLKT2_0
K30
PR27B/PCLKC2_0
L30
PR16C
H26
PR16D
G26
PR18C
L25
PR18D/VREF2_2
L26
PR22C
J28
PR22D
H28
PR27D/PCLKC2_2
N27
PR57A/LRC_DLLT_IN_F/LRC_DLLT_FB_E
AF29
PR57B/LRC_DLLC_IN_F/LRC_DLLC_FB_E
AF28
PR27C/PCLKT2_2
P26
PR17D/URC_PLLC_IN_B/URC_PLLC_FB_A
K26
PR17C/URC_PLLT_IN_B/URC_PLLT_FB_A
K25
PR29A/PCLKT3_0
P28
PR29B/PCLKC3_0
R28
PR30A
N28
PR30B
N29
PR31A
P29
PR31B
R29
PR34A
T28
PR34B
U28
PR34C/VREF1_3
T26
PR35A
M29
PR35B
N30
PR36A
T29
PR36B
U29
PR38A
P30
PR38B
R30
PR39A
U27
PR39B
V27
PR30C/PCLKT3_3
P27
PR31C/PCLKT3_2
L29
PR31D/PCLKC3_2
M30
PR34D
U26
PR35C
T24
PR51D/VREF2_3
AB27