12
LatticeSC PCI Express x1
Lattice Semiconductor
Evaluation Board User’s Guide
Test SMA Connections
General-purpose FPGA pins are available via SMA test connections. These connections are designed to permit
evaluations of several types of FPGA I/O buffers. The use of several termination schemes permits easy interfaces
for the type of buffer.
Table 15. Test SMA Connections for FPGA Pins (see Appendix A, Figure 16)
Hi
g
h Speed Test Point
DP2
(see Appendix A, Figure 15 and 16)
General-purpose FPGA pins are available via a differential test pad. These connections allow a high-impedance
probe to measure the performance of a coupled-differential output buffer pair.
Table 16. Differential I/O Test Point
Lo
g
ic Analysis Connection
LA1
(see Appendix A, Figure 15 and 16)
Agilent single-ended probes designed for connection to the supplies Tyco/AMP’s 2-767004-2 MICTOR connector
can be easily attached for signal bus analysis. Connections to general-purpose I/O pins are provided to the board
ready 3
8
-pin MICTOR connector.
SMA
Desi
g
nation
Name
SCM25
Si
g
nal
900-Ball
fpBGA
Termination
Description
Termination
Resistor(s)
J37
LVDS_I
N
P
PR52A
AB2
8
N
one
—
J39
LVDS_I
NN
PR52B
AC2
8
N
one
—
J3
8
LVDS_OUTP0
PR35A
M29
100-ohm
Differential
R275
J40
LVDS_OUT
N
0
PR35B
N
30
100-ohm
Differential
R275
Probe
True
Probe
Compliment
100-ohm
Differential Resistor
AF30
AG30
R274
Table 17. Logic Analyzer Connections
MICTOR Pin
Si
g
nal
900-Ball fpBGA
MICTOR Pin
Si
g
nal
900-Ball fpBGA
5
LA_CLK1
AJ1
6
LA_CLK2
AF4
7
LA_0
AG3
8
LA_16
AH13
9
LA_1
AH2
10
LA_17
AK
8
11
LA_2
AD
8
12
LA_1
8
AK9
13
LA_3
AF7
14
LA_19
AH14
15
LA_4
AJ7
16
LA_20
AG14
17
LA_5
AJ
8
1
8
LA_21
AK10
19
LA_6
AH10
20
LA_22
AK11
21
LA_7
AH11
22
LA_23
AH15
23
LA_
8
AF13
24
LA_24
AG15
25
LA_9
AE14
26
LA_25
AH12