20
LatticeECP3 Serial Protocol Board – Revision E
User’s Guide
17-Segment LED Display
(see Appendix A, Figure 33, D20)
General-purpose FPGA pins are connected to a 17-segment display according to Table 18. These pins can be
driven low to illuminate the display segments.
Table 18. 17-Segment LED Display
Segment
1156 fpBGA
Ball Number
A
B
C
D
G
F
E
DP
H
T S R
K M N
U
P
A
C30
B
C29
C
B31
D
A31
E
H25
F
H26
G
A30
H
A29
K
A27
M
A26
N
A28
P
B28
R
G25
S
G26
T
D25
U
C25
DP
D28
Logic Analyzer Probe
(see Appendix A, Figure 31, LA1)
An AMP/TYCO 767004 38-position .025 VERT SMD logic analyzer probe connection is provided for the user to uti-
lize for test points. This connection provides 34 general I/O signals to be observed on Logic Analyzer probes using
Mictor connections such as the Agilent 5346A.