Lattice Semiconductor LatticeECP2M SERDES User Manual Download Page 23

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LatticeECP2M SERDES

Lattice Semiconductor

Evaluation Board User’s Guide

Figure 13.

LOOP_N15

LOOP_P15

LVDS_OUTN_0

LVDS_INP_0

LVDS_INN_0

LVDS_INP_1

LVDS_INN_1

LVDS_INP_2

LVDS_INN_2

LVDS_INP_3

LVDS_INN_3

LVDS_OUTP_0

LVDS_OUTP_1

LVDS_OUTN_1

LVDS_OUTP_2

LVDS_OUTN_2

LVDS_OUTP_3

LVDS_OUTN_3

LVDS_INP_1

LVDS_INN_1

LVDS_PROBEP

LVDS_PROBEN

LOOP_P11

LOOP_N11

LOOP_P4

LOOP_N4

LOOP_P5

LOOP_N5

LOOP_P12

LOOP_N12

LOOP_P6

LOOP_N6

LOOP_P13

LOOP_N13

LOOP_P7

LOOP_N7

LOOP_N14

LOOP_P14

LOOP_P8

LOOP_N8

LOOP_N15

LOOP_P15

LOOP_P9

LOOP_N9

LOOP_P10

LOOP_N10

LOOP_P3

LOOP_N3

LOOP_P2

LOOP_N2

LOOP_P1

LOOP_N1

LOOP_P0

LOOP_N0

RS_P

LL_CLKN

RS_P

CLK_

CLKP

RS_P

CLK_

CLKN

RS_P

LL_CLKP

LOOP_P11

LOOP_N11

LOOP_P4

LOOP_N4

LOOP_P0

LOOP_N0

LOOP_P5

LOOP_N5

LOOP_P6

LOOP_N6

LOOP_P7

LOOP_N7

LOOP_P8

LOOP_N8

LOOP_P9

LOOP_N9

LOOP_P10

LOOP_N10

LOOP_P3

LOOP_N3

LOOP_P2

LOOP_N2

LOOP_P1

LOOP_N1

LOOP_P0

LOOP_N0

RS_PCLK_CLKN

RS_PCLK_CLKP

LOOP_P12

LOOP_N12

LOOP_P13

LOOP_N13

LOOP_N14

LOOP_P14

LOOP_N15

LOOP_P15

LVDS_INP_0

LVDS_INN_0

LOOP_N14

LOOP_P14

LOOP_P13

LOOP_N13

LOOP_P12

LOOP_N12

LOOP_P11

LOOP_N11

LOOP_P10

LOOP_N10

LOOP_N9

LOOP_P9

LOOP_P8

LOOP_N8

LOOP_P7

LOOP_N7

LOOP_P6

LOOP_N6

LOOP_P5

LOOP_N5

LOOP_P4

LOOP_N4

LOOP_N3

LOOP_P3

LOOP_P2

LOOP_N2

LOOP_P1

LOOP_N1

LVDS_OUTP_3

LVDS_OUTN_3

LVDS_OUTP_2

LVDS_OUTN_2

LVDS_OUTN_0

LVDS_OUTP_0

LVDS_OUTP_1

LVDS_OUTN_1

LVDS_INP_2

LVDS_INN_2

LVDS_PROBEP

LVDS_PROBEN

LVDS_INP_3

LVDS_INN_3

RS_PLL_CLKP

[8]

RS_PLL_CLKN

[8]

RS_PCLK_CLKP

[8]

RS_PCLK_CLKN

[8]

TestArray17

[10]

TestArray18

[10]

TestArray19

[10]

TestArray20

[10]

TestArray21

[10]

TestArray22

[10]

TestArray23

[10]

Title

ECP2M PCI EXPRESS Card

1.0

Differential I/O Loops

Title

ECP2M PCI EXPRESS Card

1.0

Differential I/O Loops

Title

ECP2M PCI EXPRESS Card

1.0

Differential I/O Loops

Place these resistors

close to

U1 Device

Place these resistors

close to

SMA pair

Place these resistors

close to

U1 Device

Place this resistor

close to test point

DQS PAIR

R136

100R-0603SMT

R136

100R-0603SMT

J47

Johnson 142-0711-201

J47

Johnson 142-0711-201

R152

100R-0603SMT

R152

100R-0603SMT

R130

100R-0603SMT

R130

100R-0603SMT

J39

Johnson 142-0711-201

J39

Johnson 142-0711-201

R147

100R-0603SMT

R147

100R-0603SMT

J52

Johnson 142-0711-201

J52

Johnson 142-0711-201

R142

100R-0603SMT

R142

100R-0603SMT

R133

100R-0603SMT

R133

100R-0603SMT

J49

Johnson 142-0711-201

J49

Johnson 142-0711-201

DP1DP1

R135

100R-0603SMT

R135

100R-0603SMT

J42

Johnson 142-0711-201

J42

Johnson 142-0711-201

R148

100R-0603SMT

R148

100R-0603SMT

J51

Johnson 142-0711-201

J51

Johnson 142-0711-201

R143

100R-0603SMT

R143

100R-0603SMT

R134

100R-0603SMT

R134

100R-0603SMT

R140

100R-0603SMT

R140

100R-0603SMT

J41

Johnson 142-0711-201

J41

Johnson 142-0711-201

J44

Johnson 142-0711-201

J44

Johnson 142-0711-201

R149

100R-0603SMT

R149

100R-0603SMT

R139

100R-0603SMT

R139

100R-0603SMT

R154

100R-0603SMT

R154

100R-0603SMT

R144

100R-0603SMT

R144

100R-0603SMT

R153

100R-0603SMT

R153

100R-0603SMT

Bank2

Bank3

Right

ecp2m-672fpbga

U1E

Bank2

Bank3

Right

ecp2m-672fpbga

U1E

PR9A/VREF1_2

E23

PR9B/VREF2_2

E24

PR12A/RUM0_SPLLT_FB_A

F21

PR14A

F22

PR13B*

F23

PR13A*

F24

PR11A*/RUM0_SPLLT_IN_A

F26

PR16B

G22

PR15A*

G23

PR15B*

G24

PR11B*/RUM0_SPLLC_IN_A

G26

PR12B/RUM0_SPLLC_FB_A

H20

PR22B

H21

PR21B*

H22

PR14B

J18

PR21A*

J20

PR23A*

J21

PR24B

J23

PR24A

J24

PR20B

J25

PR20A

J26

PR22A

K18

PR16A

K19

PR23B*

K20

PR25A*

K21

PR29B/RUM1_SPLLC_FB_A

K22

PR26A

K23

PR26B

K24

PR28B*/RUM1_SPLLC_IN_A

K25

PR28A*/RUM1_SPLLT_IN_A

K26

PR25B*

L19

PR32B*

L22

PR31B

L23

PR32A*

L24

PR30A*

L26

PR29A/RUM1_SPLLT_FB_A

M19

PR31A

M20

PR37B*/PCLKC3_0

M21

PR34B*

M22

PR33B

M23

PR34A*

M24

PR30B*

M26

PR39B*

N20

PR39A*

N22

PR37A*/PCLKT3_0

N23

PR33A

N26

PR38B/VREF2_3

P25

PR38A/VREF1_3

P26

PR17A*

H26

PR17B*

H25

PR18A

H24

PR18B

H23

PR19A*

J19

PR19B*

G21

PR42A/RLM2_SPLLT_FB_A

N19

PR40B

N21

PR45A

P19

PR45B

P21

PR40A

P22

PR41B*/RLM2_SPLLC_IN_A

P23

PR41A*/RLM2_SPLLT_IN_A

P24

PR48A*

R19

PR47A

R20

PR47B

R21

PR42B/RLM2_SPLLC_FB_A

R22

PR44B*

R23

PR44A*

R24

PR46A*

R26

PR48B*

T19

PR50B*

T22

PR50A*

T23

PR51A

T24

PR46B*

T26

PR54B

U18

PR58A/RLM0_GPLLT_IN_A

U20

PR56A

U21

PR54A

U22

PR51B

U24

PR49B

U25

PR49A

U26

PR58B/RLM0_GPLLC_IN_A

V23

PR57A*/RLM0_GPLLT_FB_A

V24

PR53B*

V25

PR53A*

V26

PR57B*/RLM0_GPLLC_FB_A

W24

PR55B*

W25

PR55A*

W26

PR59A*/RLM0_GDLLT_IN_A

Y26

PR59B*/RLM0_GDLLC_IN_A

AA26

PR60A/RLM0_GDLLT_FB_A

U19

PR60B/RLM0_GDLLC_FB_A

V21

PR35A/PCLKT2_0

N25

PR35B/PCLKC2_0

N24

J43

Johnson 142-0711-201

J43

Johnson 142-0711-201

R150

100R-0603SMT

R150

100R-0603SMT

R137

100R-0603SMT

R137

100R-0603SMT

R155

100R-0603SMT

R155

100R-0603SMT

J37

Johnson 142-0711-201

J37

Johnson 142-0711-201

J46

Johnson 142-0711-201

J46

Johnson 142-0711-201

R132

100R-0603SMT

R132

100R-0603SMT

R145

100R-0603SMT

R145

100R-0603SMT

J38

Johnson 142-0711-201

J38

Johnson 142-0711-201

R131

100R-0603SMT

R131

100R-0603SMT

J48

Johnson 142-0711-201

J48

Johnson 142-0711-201

R151

100R-0603SMT

R151

100R-0603SMT

R156

100R-0603SMT

R156

100R-0603SMT

J45

Johnson 142-0711-201

J45

Johnson 142-0711-201

J40

Johnson 142-0711-201

J40

Johnson 142-0711-201

R146

100R-0603SMT

R146

100R-0603SMT

R141

100R-0603SMT

R141

100R-0603SMT

R138

100R-0603SMT

R138

100R-0603SMT

J50

Johnson 142-0711-201

J50

Johnson 142-0711-201

Differential I/O Loops

Summary of Contents for LatticeECP2M SERDES

Page 1: ...May 2010 Revision EB25_01 7 LatticeECP2M SERDES Evaluation Board User s Guide ...

Page 2: ... differential traces The board has several debugging and analyzing features for complete customer evaluations of the LatticeECP2M FPGA The intended use of this guide is to be referenced in conjunction with evaluation design tutorials to demon strate the LatticeECP2M FPGA Figure 1 LatticeECP2M SERDES Evaluation Board Board Features LatticeECP2M FPGA in 672 ffBGA package Default device is LFE2M35E 6...

Page 3: ...ffort to provide evaluation board designs to help users with evaluation and development However it remains the user s responsibility to verify proper and reliable operation of Lattice products in their end application by consulting documentation provided by Lattice Differences in component selection and or PCB layout in the user s application may significantly affect circuit performance and reliab...

Page 4: ...M SERDES Evaluation Board is ready to power on The board can be supplied with power from an AC wall type transformer power supply shipped with the board Or it can be supplied from a bench top supply via terminal screw connections It also has provisions to be supplied from the PCI Express edge fingers from a host board To supply power from the factory supplied wall transformer simply connect the ou...

Page 5: ...TB1 as an alternative Table 3 Board Supply Disconnects see Appendix A Figure 3 TB1 Screw terminal for 12 VDC Pin1 square PCB pad 12V DC Pin2 Ground PCI Express Power Interface Power can be sourced to the board via the PCB edge finger CN1 This interface allows the user to provide power from a PCI Express Host board Programming FPGA Configuration see Appendix A Figure 4 A programming header is provi...

Page 6: ...s 3 5 J10 requires only a jumper across pins 1 2 Download Procedures Requirements PC with ispVM System v 16 0 or later programming management software installed with appropriate drivers USB driver for USB Cable Windows NT 2000 XP parallel port driver for ispDOWNLOAD Cable Note An option to install these drivers is included as part of the ispVM System setup ispDOWNLOAD Cable HW DLN 3C HW USBN 2A et...

Page 7: ...y be detected 2 Double click the device to open the device information dialog In the device information dialog click the Browse button located under Data File Locate the desired bitstream file bit Click OK to both dialog boxes 3 Click the green GO button This will begin the download process into the device Upon successful download the device will be operational ...

Page 8: ...s available to the user On Board Flash Memory see Appendix A Figure 4 Two memory devices U10 and U12 are on board for non volatile configuration memory storage These two devices occupy the same Flash slot on the board U10 can be populated with an 8M or smaller 8 pin SOIC device U12 can be used in place of U10 with a 16 pin TSSOP 64M Flash device U15 is supplied as an 8M Flash device J11 is used to...

Page 9: ...gnals match U2 is controlled by SW4 or from a predefined connection to U1 LatticeECP2M The DIP switch controls the isp Clock device The reference clock selection and device reset is controlled using the switches The switches that control the ispClock outputs can be synchronously controlled by the SGATE output on a bank by bank basis or tri stated on an output by output basis using the OEXb and OEY...

Page 10: ... creating a path for both input and output differential data Table 7 SERDES Connectors see Appendix A Figure 5 SMA Channel Name SMA Channel Name J18 U_HDINP0 J19 U_HDOUTP0 J21 U_HDINN0 J22 U_HDOUTN0 J24 U_HDINP1 J25 U_HDOUTP1 J26 U_HDINN1 J27 U_HDOUTN1 J29 U_HDINN2 J30 U_HDOUTP2 J32 U_HDINP2 J33 U_HDOUTN2 J20 U_HDINP3 J28 U_HDOUTP3 J23 U_HDINN3 J31 U_HDOUTN3 SERDES SFP Transceiver Interface see Ap...

Page 11: ...I Express host via the edge finger connections Note this interface is only available on boards featuring a LatticeECP2M 50 or larger FPGA FPGA Test Pins see Appendix A Figure 10 General purpose FPGA pins are available for user applications FPGA pins are connected to switches and LEDS designated according to the following table Table 11 FPGA Test Pins see Appendix A Figure 7 Switch BGA Netname LED ...

Page 12: ...t SMA Connectors see Appendix A Figure 9 SMA Designation Name LFE2M35E Signal 672 BGA Termination Description Termination Resistor s J37 LVDS_INP0 PR37A N23 100 ohm Differential R130 J39 LVDS_INN0 PR37B M21 LVDS_INP1 PR41A P24 100 ohm Differential R132 LVDS_INN1 PR41B P23 J45 LVDS_INP2 PR51A T24 100 ohm Differential R134 J47 LVDS_INN2 PR51B U24 J49 LVDS_INP3 PR57A V24 100 ohm Differential R136 J51...

Page 13: ...GND GND GND GND GND GND GND GND GND GND GND GND K7 J6 K5 L5 P5 N6 P4 R3 W5 Y4 U8 W6 G7 G8 E6 D5 G12 C8 E13 H17 E14 G17 D17 E17 High Speed Test Point DP1 see Appendix A Figure 9 General purpose FPGA pins are available to a differential test pad These connections allow a high impedance probe to measure the performance of a coupled differential output buffer pair DDR2 Memory U18 see Appendix A Figure...

Page 14: ...sion History Date Version Change Summary December 2006 01 0 Initial release December 2006 01 1 Includes new SERDES schematic in Appendix A March 2007 01 2 Added Ordering Information section April 2007 01 3 Added important information for proper connection of ispDOWNLOAD Programming Cables May 2007 01 4 Updated SW6D switch information in FPGA Test Pins table February 2008 01 5 Updated FPGA Clock Ma...

Page 15: ... D of ECP2M PCI EXPRESS Card 1 0 Cover Page C 1 11 Title v e R t c e j o r P e z i S t e e h S e t a D of ECP2M PCI EXPRESS Card 1 0 Cover Page C 1 11 Board will meet PCI Express Electromechanical Specification Rev 1 0 Add in card form factor for standard height and full length 4 376 Height x 9 5 Length ECP2M 672fpBGA Option 2 PCI Express Platform Evaluation Board SMA Test Connections 4 SERDES Cha...

Page 16: ...SMT C1 470UF FKSMT C1 470UF FKSMT R15 0R 0603SMT R15 0R 0603SMT R37 BOURNS 3224W 10K R37 BOURNS 3224W 10K C6 10UF 16V_TANTBSMT C6 10UF 16V_TANTBSMT F4 F1228CT ND 5A Fast Blo SMT Socketed Fuse F4 F1228CT ND 5A Fast Blo SMT Socketed Fuse C5 330UF FKSMT C5 330UF FKSMT C7 330UF FKSMT C7 330UF FKSMT R28 0R 0603SMT R28 0R 0603SMT TP8 TESTPOINT TP8 TESTPOINT 1 F2 F1228CT ND 5A Fast Blo SMT Socketed Fuse ...

Page 17: ... U_VCCTX2 C17 U_VCCP C19 U_VCCTX1 C21 U_VCCTX0 C22 U_VCCRX1 C24 U_VCCRX0 C25 U_VCCIB0 B25 U_VCCIB1 C23 U_VCCIB2 C15 U_VCCIB3 B13 U_VCCOB0 A22 U_VCCOB1 C20 U_VCCOB2 C18 U_VCCOB3 A16 L_VCCOB3 AF16 L_VCCOB1 AD20 L_VCCOB2 AD18 L_VCCOB0 AF22 L_VCCAUX33 AE19 U_VCCAUX33 B19 L_VCCIB0 AE25 L_VCCIB1 AD23 L_VCCIB2 AD15 L_VCCIB3 AE13 C42 100NF 0603SMT C42 100NF 0603SMT C102 100NF 0603SMT C102 100NF 0603SMT FB...

Page 18: ... R51 680R 0603SMT SW3 B3F 1150 Momentary Switch SW3 B3F 1150 Momentary Switch 1 3 2 4 U14B SN74LVC125A SO14 U14B SN74LVC125A SO14 3Y 8 3A 9 3OE_N 10 4Y 11 4A 12 4OE_N 13 VCC 14 SW1 SW DIP 3 CTS 194 3MST SW1 SW DIP 3 CTS 194 3MST 1 2 3 6 5 4 RN1A 4 7K RN1A 4 7K 1 8 C143 100NF 0603SMT C143 100NF 0603SMT U9 NC7WZ16 MACO6A Fairchild TinyLogic U9 NC7WZ16 MACO6A Fairchild TinyLogic IN A1 1 GND 2 IN A2 3...

Page 19: ...T R234 1K 0603SMT R234 1K 0603SMT CN5 HOST_SFP CN5 HOST_SFP VeeT 1 TxFault 2 TxDisable 3 Mod_Def_2 4 Mod_Def_1 5 Mod_Def_0 6 RateSel 7 LOS 8 VeeR 9 VeeR 10 VeeR 11 RD 12 RD 13 VeeR 14 VccR 15 VccT 16 VeeT 17 TD 19 VeeT 20 TD 18 R228 10K 0603SMT R228 10K 0603SMT R231 150R 0603SMT R231 150R 0603SMT C424 10NF 0402SMT C424 10NF 0402SMT R215 100R 0603SMT R215 100R 0603SMT J32 Rosenberger 32K153 400E3 J...

Page 20: ...18A AF5 PB18B AF6 PB15A W12 PB16A W13 PB2A AB6 PB2B Y8 PB3A AD1 PB3B AD2 PB4A AC5 PB4B AA8 PB5A AC6 PB5B W9 PB6A AB7 PB6B Y9 PB7A AD3 PB7B AD4 PB8A AA9 PB8B W10 PB9A AC7 PB9B Y10 PB10A AE2 PB10B AD5 PB12A W11 PB12B AB8 PB11A AE4 PB11B AE3 PB24B AB12 PB23B AC10 PB19B AB11 PB21B AA12 PB22B AF8 PB20B AF7 PB22A AE8 PB23A AD9 PB21A AD8 PB20A AD7 PB19A Y12 PB25A AD10 PB25B Y13 PB26A AF9 PB26B AE9 PB33A ...

Page 21: ...3SMT C191 10NF 0603SMT C208 100NF 0603SMT C208 100NF 0603SMT R96 51R 0603SMT R96 51R 0603SMT C201 1UF 16V 0805SMT C201 1UF 16V 0805SMT R95 51R 0603SMT R95 51R 0603SMT C209 10NF 0603SMT C209 10NF 0603SMT C192 100NF 0603SMT C192 100NF 0603SMT C199 1UF 16V 0805SMT C199 1UF 16V 0805SMT C200 22UF 16V_TANTBSMT C200 22UF 16V_TANTBSMT R94 1K 0603SMT R94 1K 0603SMT C210 100NF 0603SMT C210 100NF 0603SMT C19...

Page 22: ...NF 0603SMT RN15F 1K RN15F 1K 6 11 R100 OPEN 0603SMT R100 OPEN 0603SMT C415 10NF 0603SMT C415 10NF 0603SMT J35 Johnson 142 0711 201 J35 Johnson 142 0711 201 1 2 R115 OPEN 0603SMT R115 OPEN 0603SMT C223 100NF 0603SMT C223 100NF 0603SMT R104 82R 0603SMT R104 82R 0603SMT R116 100R 0603SMT R116 100R 0603SMT R110 51R 0603SMT R110 51R 0603SMT U2 ispCLK5620A 100TQFP U2 ispCLK5620A 100TQFP VCCA 30 VCCD1 47...

Page 23: ...42 Johnson 142 0711 201 J42 Johnson 142 0711 201 1 2 R148 100R 0603SMT R148 100R 0603SMT J51 Johnson 142 0711 201 J51 Johnson 142 0711 201 1 2 R143 100R 0603SMT R143 100R 0603SMT R134 100R 0603SMT R134 100R 0603SMT R140 100R 0603SMT R140 100R 0603SMT J41 Johnson 142 0711 201 J41 Johnson 142 0711 201 1 2 J44 Johnson 142 0711 201 J44 Johnson 142 0711 201 1 2 R149 100R 0603SMT R149 100R 0603SMT R139 ...

Page 24: ..._IN_A P1 PL41B LLM2_SPLLC_IN_A R1 PL42A LLM2_SPLLT_FB_A N8 PL42B LLM2_SPLLC_FB_A R5 PL44A T3 PL44B T4 PL45A P8 PL45B R6 PL46A T1 PL46B U1 PL47A R7 PL47B T5 PL48A U3 PL48B U4 PL49A U5 PL49B U6 PL50A U2 PL50B V1 PL51A W2 PL51B V2 PL55A V4 PL55B V3 PL57A LLM0_GPLLT_IN_A W4 PL57B LLM0_GPLLC_IN_A W3 PL58A LLM0_GPLLT_FB_A W1 PL58B LLM0_GPLLC_FB_A Y1 PL59A LLM0_GDLLT_IN_A AA1 PL59B LLM0_GDLLC_IN_A AB1 PL...

Page 25: ...22 VSS E5 VSS E9 VSS F2 VSS F25 VSS G11 VSS G16 VSS J22 VSS J5 VSS K11 VSS K13 VSS K14 VSS K16 VSS L10 VSS L11 VSS L16 VSS L17 VSS L2 VSS L20 VSS L25 VSS L7 VSS M13 VSS M14 VSS N10 VSS N12 VSS N13 VSS N14 VSS N15 VSS N17 VSS P10 VSS P12 VSS P13 VSS P14 VSS P15 VSS P17 VSS R13 VSS R14 VSS T10 VSS T11 VSS T16 VSS T17 VSS T2 VSS T20 VSS T25 VSS T7 VSS U11 VSS U13 VSS U14 VSS U16 VSS V22 VSS V5 VSS Y1...

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