Lake Shore 625, User Manual

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Lake Shore Model 625 Superconducting MPS User’s Manual
Computer Interface Operation 5-9
Figure 5-3. Operation Event Register
5.1.4.3 Error Status Register Sets
As shown in Figure 5-1, there are three register sets in the error status system of the Model 625; Hardware Error Status
Register, Operational Error Status Register, and the Persistent Switch Error Register.
5.1.4.3.1 Hardware Error Status Register Set
The Hardware Error Status Register reports the following instrument hardware error events: DAC processor not
responding, output control failure, output over voltage, output over current, low line voltage, temperature fault. Any or
all of these events may be reported in the standard event summary bit through the enable register, see Figure 5-2. The
Hardware Error Status Register is the first value of the three values associated with the Error Status Registers. The Error
Status Enable command (ERSTE) programs the enable register and the query command (ERSTE?) reads it. ERSTR?
reads and clears the Error Status Register. The used bits of the Error Status Event Register are described as follows:
DAC Processor Not Responding (DAC), Bit (5) – This bit is set to indicate that communication to the DAC processor
has failed.
Output Control Failure (OCF), Bit (4) – This bit is set if there is a failure on the output control board.
Output Over Voltage (OOV), Bit (3) – This bit is set if the output voltage exceeded the compliance voltage limit
setting.
Output Over Current (OOC), Bit (2) – This bit is set if the output current is above 62 A exceeding the maximum
output current of the instrument.
Low Line Voltage (LLV), Bit (1) – This bit is set if the power line voltage drops below an acceptable amplitude.
Temperature Fault (TF), Bit (0) – This bit is set if the internal temperature of the instrument exceeded the maximum
safe value of 80 °C.