mITX-BDW-U – User Guide, Rev. 1.6
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South Bridge Configuration
Function
Selection
Description
SMBUS Device
Disabled
Enabled
Enable/Disable SMBUS Device.
Port 80h Cycles
LPC Bus
PCI Bus
Control where the Port 80h cycles are sent.
PCI Clock Run Logic
Disabled
Enabled
Controls PCIe clock gate power saving feature.
HPET Support
Disabled
Enabled
Control the High Precision Event Timer through this
setup option. When enabled, the RSDT points to the
HPET table and the proper enable bits are set.
HPET Memory Map BAR
FED00000
FED01000
FED02000
FED03000
Select the HPET Memory Map Base Address.
Enable CRID
Disabled
Enabled
Enable Compatible Revision ID.
DeepSx Mode
Disabled
Enabled only in S5/Battery
Enabled only in S4-S5/Battery
Enabled in S3-S5/Battery
Configure the DeepSx Mode configuration.
GP27 Wake From
DeepSx
Disabled
Enabled
Wake From DeepSx by the assertion of GP27 pin.
State After G3
State S5
State S0
Specify what state to switch to when power is re-
applied after a power failure (G3 state).
Summary of Contents for mITX-BDW-U
Page 1: ... USER GUIDE mITX BDW U User Guide Rev 1 6 Doc ID 1060 4825 KTD N0XXX A ...
Page 17: ...mITX BDW U User Guide Rev 1 6 www kontron com 17 3 2 mITX BDW U Block Diagram ...
Page 46: ...mITX BDW U User Guide Rev 1 6 www kontron com 46 System Information ...
Page 52: ...mITX BDW U User Guide Rev 1 6 www kontron com 52 Silicon Information ACPI Configuration ...
Page 99: ...mITX BDW U User Guide Rev 1 6 www kontron com 99 10 4 Boot ...
Page 102: ...mITX BDW U User Guide Rev 1 6 www kontron com 102 ...