Kenwood TK-880 series Service Manual Download Page 27

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TK-880

■

AF Signal System

The detection signal (DEO) from the TX-RX unit (A/2)

goes to the audio processor (IC504) of the TX-RX unit (B/2).
The signal passes through a filter in the audio processor to
adjust the gain, and is output to IC502. IC502 sums the AF
signal and the DTMF signal and returns the resulting signal
to the TX-RX unit (A/2). The signal (AFO) sent to the TX-RX
unit (A/2) is input to the D/A converter (IC5). The AFO out-
put level is adjusted by the D/A converter. The signal output
from the D/A converter is added with the BEEP signal (BPO)
and the resulting signal is input to the audio power amplifier
(IC10). The AF signal from IC10 switches between the inter-
nal speaker and speaker jack (J1) output.

AUDIO

PROCE.

SUM

AMP

D/A

CONV.

IC504

IC502

IC5

AF PA

IC10

DTMF

BPO

AFO

DEO

TX-RX UNIT (B/2) : Control section

■

Squelch Circuit

The detection output from the FM IF IC (IC11) is ampli-

fied by IC2 and the signal (DEO) is sent to the TX-RX unit (B/
2). The signal passes through a high-pass filter and a noise
amplifier (Q503) in the TX-RX unit (B/2) to detect noise. A
voltage is applied to the CPU (IC511). The CPU controls
squelch according to the voltage (ASQ) level. The signal
from the RSSI pin of IC11 is monitored. The electric field
strength of the receive signal can be known before the ASQ
voltage is input to the CPU, and the scan stop speed is im-
proved.

Transmitter System

■

Outline

The transmitter circuit produces and amplifies the de-

sired frequency directly. It FM-modulates the carrier signal
by means of a varicap diode.

■

VCO/PLL Circuit

The TK-880 has a VCO for the transmitter and a VCO for

the receiver in a sub-unit (A1). They are housed in a solid
shielded case and connected to the TX-RX unit (A/2) through
CN101. One of the VCOs is selected with an ST signal. A
filtered low-noise power supply is used for the VCOs and
varicap diodes.

The VCO for the transmitter is described below. It is de-

signed so that Q103 turns on with a prescribed frequency
when a reverse bias is applied to D102 and D104 by using
the control voltage (CV) through CN101. The control voltage
is changed by turning the trimmer capacitor (IC109). The
output from Q103 is applied to the buffer amplifier (Q106) to
generate a VCO output signal. This signal is used as a drive
input signal or a local signal of the first mixer. Since a signal
output from Q160 is input to the PLL IC, it passes through
CN101 and buffer amplifier (Q300) and goes to the PLL IC
(IC300). The modulation signal from CN101 is applied to
D105 and passes through C112 and C113 to modulate the
carrier.

The PLL IC uses a fractional N type synthesizer to im-

prove the C/N ratio and lock-up speed. The VCO output sig-
nal input to the pin 5 of the PLL IC is divided to produce a
comparison frequency according to a channel step. This sig-
nal is compared with the reference frequency which is out-
put from the VCXO (X1). VCXO provides 16.8MHz, 2.5ppm
(–30 to +60

C) and guarantees stable performance when

the temperature changes. The output signal from the phase
comparator passes through a charge pump and an external
active LPF (Q301, Q302) in the PLL IC to generate a DC VCO
control voltage CV. Serial data (DT, CK, EP) are output from
the CPU (IC511) and shift register (IC8) in the TX-RX unit (B/
2) to control the PLL IC. The PLL lock status is always moni-
tored by the CPU.

FIg. 4

AF signal system

IC2

AMP

IC503

AMP

Q503

NOISE AMP D509

IC11

IC511

DEO

RSSI