
TK-5310
SCHEMATIC DIAGRAM
E
E
E
E
E
E
D
E
D
D
D
E
E
E
R572
4.7k
R582
470k
C507
0.1u
C530
0.1u
R645
100k
R573
10
C533
10u6.3
C506
0.01u
R557
47
R554
47
C532
0.1u
C541
10u
R589
100k
IC463
TC75W51FK(F)
1
2
3
4
5
6
7
8
R534
100k
R575
470k
IC606
BU4094BCFV
1
STRB
2
DATA
3
CLK
4
Q1
5
Q2
6
Q3
7
Q4
8
VSS
9
QS
10
Q’S
11
Q8
12
Q7
13
Q6
14
Q5
15
OE
16
VDD
R570
3.3k
C529
0.01u
C539
100p
C540
0.1u
C508
0.01u
R566
10k
R583
47
R591
68k
IC457
EX128TQ64I630C
1
GND
2
SROUT(0)
3
SROUT(1)
4
TMS
5
GND
6
VCCI
7
SROUT(2)
8
SROUT(3)
9
SROUT(4)
10
SROUT(5)
11
SROUT(6)
12
SROUT(7)
13
STRB
14
GND
15
TESTMODE
16 DSPCLK
17
IF_IN
18
RESET
19
VCCI
20
DIFF
21
SR
OE
22
VCCA
23
GND
24
FLRCK
25
SRCK2
26
FSCLK
27
FMCLK
28
CLK
OUT
29
FSOUT
30
SOUT
31
SRIN
32
CPUCLK
33
GND
34
BUFA(0)
35
BUFA(1)
36
VSV(VCCA)
37
VCCI
38
BUFA(2)
39
BUFY(3)
40
BUFA(3)
41
BUFA(7)
42
CLK
43
BUFA(5)
44
VPP(VCCA)
45
LP/GND
46
GND
47
BUFA(8)
48
SMPLCLK
49
B
UFY(0)
50
B
UFY(1)
51
B
UFY(2)
52
VCCI
53
BU
F
A(4)
54
B
UFY(4)
55
NO
56
NO
57
VCCA
58
GND
59
B
UFY(5)
60
B
UFY(6)
61
VCCI
62
B
UFY(7)
63
B
UFY(8)
64
BU
F
A(6)
IC462
M62364FP-F
1
VIN1
2
VoUT1
3
VoUT2
4
VIN2
5
VDD
6
LD
7
CLK
8
DI
9
VIN3
10
VoUT3
11
VoUT4
12
VIN4
13
VIN5
14
VoUT5
15
VoUT6
16
VIN6
17
D0
18
VDAREF
19
RESET
20
GND
21
VIN7
22
VoUT7
23
VoUT8
24
VIN8
R531
1k
C535
0.1u
R590
1k
R576
470k
R584
47
R535
6.8k
R558
100k
R574
470k
R585
470k
C528
0.1u
R532
820
R530
1k
C513
0.1u
C534
0.1u
R595
8.2k
C543
100p
R586
470k
R568
10k
Q605
UM6K1N
R565
1M
D455
1SS388F
R587
1k
R581
47
C520
0.01u
R539
10
C522
0.01u
R528
1k
R533
100k
C538
1u
C542
0.1u
C511
0.01u
C536
1u
L610
R529
10k
R593
10k
R580
10
R577
47k
R559
47
R579
100k
R567
100k
C531
0.1u
R649
3.9k
D454
1SS388F
C646
0.1u
SSM3K15TE(F)
Q461
R592
1k
C499
0.1u
C537
0.1u
R544
10
IC460
TC7W66FK-F
1 IN_oUT1
2 oUT_IN1
3
CoNT2
4
GND
5
IN_oUT2
6
oUT_IN2
7
CoNT1
8
VCC
R560
100k
R647
100k
R597
100k
R648
3.9k
3.9k
R644
C523
0.01u
R596
120k
R571
100k
IC461
TC75S51FE(F)
1
IN+
2
VSS
3
IN-
4
oUT
5
VDD
TUNE2
5M
5M
CLK1
LD1
L2SF
DA
T
1
33A
VC
TUNE
APC
33A
V
ARS
Ao
AI
BEEP
LRST
ECSW
VATS
5MC
STRB
VARS
CS
SDo
UN_D
A
T
SRESET
IF_IN
CLK
SCLK1
oE
TCoNT
EXTIM
DSR
CTS
EXTI
RXD
oP_INH
BUSY
oPT4
DAT1
CLK1
oPT1
STRB1
oP_MAN
oPT5
oE1
UN_DAT
CHGIo
oPT6
oPT2
oPT3
oPT1
33M
5M
25D
oPT3
oPT2
33M
KEY_PLA
Y
A
UXI
RXDM
TCNT
INH
DSRM
CTSM
33M
ST
oN
5V 3.3V
LEVEL CONVERTER
SHIFT REGISTER
FPGA
D/A CONVERTER
CPU
POWER
DSP-FPGA
CPU
OPTION
OPTION
POWER
CPU
POWER
MICE
SP+
SP-
SP-
MICE
SP+
CV
CV
OPTION
OPTION
OPTION
MIC
MIC
REVERSE
CURRENT
PREVENTION
REVERSE
CURRENT
PREVENTION
CPU
CPU
CPU
SW(VGS RX I/O)
VGS I/O SW
RX SUMMING AMP
DSP-FPGA
POWER
POWER
CV
OP AMP
(TX MOD AMP/
3.3V REFERENCE)
TX-RX UNIT :TX-RX SECTION(X57-7250-XX)(A/5)
P
Q
R
S
T
X57-725 4/12
Summary of Contents for TK-5310
Page 96: ...TK 5310 91 MEMO ...