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KPCI -3160 User’s Manual
External Interrupts
4-3
External interrupt application
Typically, you would use an external interrupt to ensure that the application program processes,
at a specific time (or at two specific times, if both positive-edge and negative-edge triggering are
used), specific data that are present at one or more ports. You can do this with a KPCI-3160
external interrupt, subject to the following limitations:
•
A KPCI-3160 external interrupt signal indiscriminately triggers data transfer from all twelve
I/O ports: both data that does need to be processed and data that does not need to be pro-
cessed. The board provides no way to assign interrupts or intrinsically detect the interrupt
status for a specific port. (However, you could potentially hardware-set and software-detect
certain I/O bits to tell a custom application program which ports to process for a given inter-
rupt. Or you could compare the current and previous data sets, and then process only
changed data.)
•
Conversely, if processing needs and interrupts occur too frequently, data that does need to be
processed can be missed. External interrupt signals are ignored during an interrupt service
routine (ISR) while an interrupt-pending bit is set high—except that the first interrupt miss,
only, does set an interrupt-missed bit.
Therefore, you must 1) know how fast your host computer and application software can process
data, and 2) space important data and interrupts accordingly. Of course, this requirement is not
specific to the KPCI-3160 board. It applies to any data acquisition board.
You must also ensure, at the end of interrupt-initiated processing, that the application program
resets the interrupt-pending bit, the interrupt-missed bit, and two other bits that recorded
whether the interrupt occurred on the rising or falling edge of the interrupt request signal.
DriverLINX handles this automatically.
Refer to
Table 4-2
for a list of external-interrupt responses.
For an additional application illustration, refer to the “
Interrupt example scenario
” subsection in
Appendix B
. For information on setting and configuration of external interrupts, refer to your
DriverLINX software manuals.
NOTE
Do not confuse the external interrupt INT_REQ with the internal PCI
bus interrupt INTA, even though INT_REQ and INTA are linked by soft-
ware. (The PCI bus shares one interrupt line, INTA, for all boards. INTA
interrupts the host computer each time a transfer is occurring.)
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