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Digital Input and Output Subsystems
C-21
The D/A conversion delay to output a periodic waveform with a given
number of samples per period is simple to determine. For example, the
conversion delay for a 200Hz wave with 100 samples/cycle is
D/A Data Lost
DAS-1800AO models provide hardware monitoring of DAC FIFO
underflow in DMA and Interrupt modes only. DriverLINX notifies
applications that data loss has occurred by posting an event message,
DL_DATALOST. The task will become inactive once this error occurs
and the hardware will stop data transfer.
Digital Input and Output Subsystems
Logical Channels
For logical channel 0, the digital input port is a composite of the signals
DI 0, DI 1, DI 2, DI 3 and the output port is a composite of the signals DO
0, DO 1, DO 2, DO 3.
You can use the external multiplexer outputs MUX4-7 as pseudo digital
outputs for applications requiring more than four digital outputs. Since
the channel/gain QRAM controls the state of these outputs, changes to the
Table C-8. Logical Channels and Physical Digital I/O
Logical Channel Physical Digital Input
Physical Digital Output
0
DI 0-3
DO 0-3
1
MUX4 - MUX7 + GEXT
2
TGIN
T
1
frequency
------------------------
1
200Hz
----------------
5ms
=
=
=
D/A conversion delay
5ms
100 samples
-----------------------------
50ms
=
=
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