17
Connection
Loading effects
Loading of the voltage source becomes a consideration for low resistance loads. As the source resistance increases, the error
caused by loading increases.
Figure 17
shows the method used to determine the percent error due to loading where:
V
s
is the programmed analog output of the Model 7706
R
Lead
is the total lead resistance of the wiring and connections
R
Load
is the resistance of the user’s circuit
V
M
is the measured voltage
The voltage actually measured by the meter is attenuated by the voltage divider action of R
S
and R
I
, and it can be calculated as
follows:
This relationship can be modified to directly compute for percent error:
Using the above equation, to keep loading error within 0.1%, the resistance of the Model 7706 system must be at least 1/999
th
the value of load resistance.
Figure 17
Loading effects
DAC output errors
The DAC output is most accurate when the Model 7706 is operated in stable temperature conditions that are as close as possible
to the environmental conditions used for calibration. Offset voltage drift over temperature is 1mV/°C. Also, the offset voltage
value may change when changing from slot 1 to slot 2.
V
M
V
S
R
Load
R
Load
R
Lead
+
-----------------------------------
=
Percent Error
R
Load
R
Load
R
Lead
+
-----------------------------------
100
×
=
V
S
Source
Voltage
+
–
R
R
Load
V
M
Measured
Voltage
V
S
Source
Voltage
+
–
R
Lead
R
Load
V
M
Measured
Voltage
