Theory of Operation:
Controller:
A Texas Instruments MSP430 micro controller (MPU) is used to control the rig. This is a 16 bit processor, with 8K of
Flash memory, 256 bytes of RAM, two 64 byte “information” Flash memory locations, 23 I/O ports, and internal 8 MHz R/C
clock oscillator. The main reason this part was chosen was for it very low operating current, a mere 260 u amps per MHz of
clock frequency. An external 32.756 kHz watch crystal is used as a time base for the keyer and side tone oscillator. The
internal 8 MHz R/C oscillator has a wide tolerance and is temperature dependent, making it less suitable for exact timing
tasks.
The primary function of the processor is to control the DDS chip, which is the VFO for the rig. On power up, the
processor looks at two pins on the filter board to determine which band is being used. From that, it then loads constants for
the transmit frequency. The actual DDS phase accumulator data is then calculated for that operating frequency, based on
the DDS reference oscillator frequency.
At the same time the transmit frequency is calculated, an IF offset is added or subtracted to the transmit frequency.
This number is loaded into the DDS chip for use as the receivers LO frequency. As the receiver is tuned up and down the
band, a new phase word is calculated. This ensures that the actual operating frequency and the frequency the Audio
frequency Annunciator (AFA) closely match.
The secondary function of the processor is to implement an Iambic keyer, and to handle the various control
functions which are need to switch between receive and transmit. It also generate the side tone.
Power on reset:
The MPU will continue to run down to about 2 volts. Because of the MPU draws very little current, the filter cap
across its supply line will keep it going for a while after power to the board is removed. Therefore, to ensure proper rest
when power is quickly removed and restored, such as when changing band modules, a microprocessor supervisor reset
chip is used to reset the processor when its supply voltage drops below 3.15 volts.
Software listing
There is a file on the CD called “ats3b_digi.s43” which is the program source code. The file can be opened and read by any
word processing program. The software source code is included for those who might be interested in seeing what it takes to
run this rig. Those who are into assembly language programming may want to get the IAR development package for the TI
MPS430 processor so that they can modify and compile the program. The development program can be down loaded from
the TI web site for free, but its a big file. The board for the rig includes a place to connect an in-circuit programmer to (the row
of holes above the MPU), so the MPU can be easily reprogrammed with the proper hardware.
DDS
The operating frequency of the rig is synthesized by an Analog Devices AD9834 DDS chip. This is a low power
synthesizer, which can be clocked up to 75 MHz. The maximum output frequency in theory is ½ the clock, but in practice it
needs to be limited to about 1/3d to prevent the generation of difficult to filter spurious signals. The ATS-3B uses a 60 MHz
reference clock, so that when producing a 21 MHz signal, it is near the 1/3d the clock limit. A 5 pole elliptical low pass filter
smooths out the stepped DAC output of the DDS and removes harmonics.
The sine wave output of the filter is used to supply the LO signal to the receivers first mixer. This signal is also feed
back into the DDS chip, into a fast, on chip comparator. This squares up the sine wave to produce a square wave output and
is then used to drive the transmitter. This output can be conveniently turned on and off by software.
The DDS chip has two major sections inside, the digital side and analog side. This DDS chip can operate with
different supply voltages on each section. Therefore, the digital side is powered by 3.5 volts and the analog side 5 volts. By
running the digital section with 3.5 volts, lower operating current is achieved. This also keeps any digital noise on the 3.5
volts supply, which also powers the MPU, out of the analog section and reduces spurs. All in all, between the supply isolation,
the low operating current of both the MPU and DDS, there is hardly a spur to be heard in the receiver.
Receiver:
The receiver is based on the classic NE602 (replaced by the SA612A) design, used in many QRP rigs. The receiver
input signal from the antenna first passes through the transmitters low pass filter. QSK switching is done by using a 2N7002
MOSFET transistors in a series between the PA output and receiver input.
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