XM-R700SL
1-28
AK4562VN-W (IC801) : A/D, D/A comverter
1. Pin layout
2. Block diagram
3. Pin function
1
2
3
4
5
6
7
21
20
19
18
17
16
15
28
27
26
25
24
23
22
8
9
10
11
12
13
14
VREF
VA
AGND
VT
VD
DGND
LRCK
BCLK
SDTO
SDTI
PDN
TST
VCOM
MCLK
SSB
CDTI
(SSI)
CCLK
(SCK)
CSN
LOUT1
ROUT1
LIN1
LIN2
RIN1
RIN2
OPGAL
LOUT2
OPGAR
ROUT2
ADC
HPF
Audio I/F
Controller
Clock Divider
Control Register I/F
DAC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
I
O
O
I
I
I
I
-
-
-
-
-
-
-
O
I
I
I
I
I
I
I
I
I
I
O
I
O
Rch OPGA Input Pin
Lch OPGA Output Pin
Rch OPGA Output Pin
Lch #1 Input Pin
Rch #1 Input Pin
Lch #2 Input Pin
Rch #2 Input Pin
Analog Common Voltage Output Pin, 0.45 x VA
Analog Ground Pin
Analog Power Supply Pin, +2.5V
Analog voltage Reference Input Pin.
Used as a voltage reference of ADC & DAC. VREF is connected externally to filterd VA.
Digital power supply Pin, +2.5V
Digital Ground Pin
Digital Interface Power Suooly Pin
Audio Serial Data Output Pin
Audio Serial Data Intput Pin
Audio Serial Data Clock Pin
Test Mode Pin, Fixed to "L"
Master Clock Input Pin
Input/Output Channel Clock Pin
Control Data Input Pin, SSB Mode : SSI
Control Clock Input Pin, SSB Mode : SCK
Chip Select Pin, SSB Mode : "H"
Resect & Power Down Pin, "L" : Power down & Reset, "H" : Normal Operation
Control I/F Mode Select Pin, "L" : AKM Mode, "H" : SSB Mode
Lch DAC Output Pin
Lch OPGA Input Pin
Rch DAC Option Pin
OPGAR
LOUT2
ROUT2
LIN1
RIN1
LIN2
RIN2
VCOM
AGND
VA
VREF
VD
DGND
VT
SDTO
SDTI
BCLK
TST
MCLK
LRCK
CDTI
CCLK
CSN
PDN
SSB
LOUT1
OPGAL
ROUT1
No.
Pin Name
I/O
Function
Summary of Contents for XM-R700SL
Page 40: ...2 2 XM R700SL M E M O ...
Page 46: ...XM R700SL 3 2 M E M O ...