CV-M9 GE
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6.2. Inputs and outputs table
Signals I/O
Description
diagram
LVAL_IN
I
LVAL (Line Valid) from camera timing circuit
(See chapter 8.4 for timing relationship)
DVAL IN
I
DVAL from camera
FVAL_IN
I
FVAL (Frame Valid) from camera timing circuit
(See chapter 8.4 for timing relationship)
EEN_IN
I
EEN (Exposure Enable) from camera timing
circuit. (See chapter 8.4 for timing
relationship)
HIROSE_TTL_IN1
I
TTL input on pin 6 of Hirose 12-pin.
Active when TTL is selected by xTTL_LVDS Sel
Fig. 4
HIROSE_TTL_IN2
I
TTL input on pin 7 of Hirose 12-pin.
Active when TTL is selected by xTTL_LVDS Sel
Fig. 4
LVDS_IN
I
LVDS signal input on Hirose connector
LVDS + Pin 6 / LVDS – Pin 7
Active when LVDS is selected by xTTL_LVDS Sel
Fig. 5
HIROSE_TTL_IN3
I
TTL input on pin 10 of Hirose 12-pin.
Fig. 6
Soft_Trigger_0
I
Software trigger input from Ethernet
Refer to GPIO module register xx
Pulse Generator out 0
I
Pulse Generator 0 output
Pulse Generator out 1
I
Pulse Generator 1 output
Pulse Generator out 2
I
Pulse Generator 2 output
Pulse Generator out 3
I
Pulse Generator 3 output
CAMERA TRIGGER
O Trigger signal to camera timing circuit.
HIROSE TTL OUT 1
O TTL output on Pin 8 of Hirose 12-pin
Fig. 7
HIROSE TTL OUT 2
O TTL output on Pin 9 of Hirose 12-pin
Fig. 7
Pulse Generator in 0
O Pulse Generator 0 Clear input
Pulse Generator in 1
O Pulse Generator 1 Clear input
Pulse Generator in 2
O Pulse Generator 2 Clear input
Pulse Generator in 3
O Pulse Generator 3 Clear input
